arm64: dts: ti: k3-j784s4-evm: Add phase tags marking

bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to cover U-Boot challenges with DT.
That's why add it also to Linux to be aligned with bootloader requirement.

wkup_i2c0, mcu_uart0, main_uart8, fss, ospi0, ospi1, main_sdhci0 and
main_sdhci1 are required for bootloader operation on TI K3 J784S4 EVM.
These IPs along with pinmuxes need to be marked for all bootloader phases,
hence add bootph-all to these nodes in kernel dts.

Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230811192030.3480616-3-a-nandan@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
index b4ffa720209c3a376a103d20bf5801c08f370a12..5991c2e1d994c8a5234f28030da11c4f10a0304c 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
@@ -252,7 +252,9 @@
 };
 
 &main_pmx0 {
+       bootph-all;
        main_uart8_pins_default: main-uart8-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        J784S4_IOPAD(0x040, PIN_INPUT, 14) /* (AF37) MCASP0_AXR0.UART8_CTSn */
                        J784S4_IOPAD(0x044, PIN_OUTPUT, 14) /* (AG37) MCASP0_AXR1.UART8_RTSn */
@@ -269,6 +271,7 @@
        };
 
        main_mmc1_pins_default: main-mmc1-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        J784S4_IOPAD(0x104, PIN_INPUT, 0) /* (AB38) MMC1_CLK */
                        J784S4_IOPAD(0x108, PIN_INPUT, 0) /* (AB36) MMC1_CMD */
@@ -289,7 +292,9 @@
 };
 
 &wkup_pmx2 {
+       bootph-all;
        wkup_uart0_pins_default: wkup-uart0-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (L37) WKUP_GPIO0_6.WKUP_UART0_CTSn */
                        J721S2_WKUP_IOPAD(0x074, PIN_INPUT, 0) /* (L36) WKUP_GPIO0_7.WKUP_UART0_RTSn */
@@ -299,6 +304,7 @@
        };
 
        wkup_i2c0_pins_default: wkup-i2c0-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        J721S2_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */
                        J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */
@@ -306,6 +312,7 @@
        };
 
        mcu_uart0_pins_default: mcu-uart0-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        J784S4_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (H37) WKUP_GPIO0_14.MCU_UART0_CTSn */
                        J784S4_WKUP_IOPAD(0x094, PIN_OUTPUT, 0) /* (K37) WKUP_GPIO0_15.MCU_UART0_RTSn */
@@ -366,7 +373,9 @@
 };
 
 &wkup_pmx0 {
+       bootph-all;
        mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (E32) MCU_OSPI0_CLK */
                        J784S4_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (A32) MCU_OSPI0_CSn0 */
@@ -384,7 +393,9 @@
 };
 
 &wkup_pmx1 {
+       bootph-all;
        mcu_fss0_ospi0_1_pins_default: mcu-fss0-ospi0-1-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        J784S4_WKUP_IOPAD(0x004, PIN_OUTPUT, 6) /* (C32) MCU_OSPI0_ECC_FAIL */
                        J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 6) /* (B34) MCU_OSPI0_RESET_OUT0 */
@@ -392,6 +403,7 @@
        };
 
        mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (F32) MCU_OSPI1_CLK */
                        J784S4_WKUP_IOPAD(0x024, PIN_OUTPUT, 0) /* (G32) MCU_OSPI1_CSn0 */
@@ -413,6 +425,7 @@
 };
 
 &wkup_i2c0 {
+       bootph-all;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&wkup_i2c0_pins_default>;
@@ -426,12 +439,14 @@
 };
 
 &mcu_uart0 {
+       bootph-all;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&mcu_uart0_pins_default>;
 };
 
 &main_uart8 {
+       bootph-all;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&main_uart8_pins_default>;
@@ -442,15 +457,18 @@
 };
 
 &fss {
+       bootph-all;
        status = "okay";
 };
 
 &ospi0 {
+       bootph-all;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&mcu_fss0_ospi0_pins_default>, <&mcu_fss0_ospi0_1_pins_default>;
 
        flash@0 {
+               bootph-all;
                compatible = "jedec,spi-nor";
                reg = <0x0>;
                spi-tx-bus-width = <8>;
@@ -498,6 +516,7 @@
                        };
 
                        partition@3fc0000 {
+                               bootph-all;
                                label = "ospi.phypattern";
                                reg = <0x3fc0000 0x40000>;
                        };
@@ -506,11 +525,13 @@
 };
 
 &ospi1 {
+       bootph-all;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
 
        flash@0 {
+               bootph-all;
                compatible = "jedec,spi-nor";
                reg = <0x0>;
                spi-tx-bus-width = <1>;
@@ -558,6 +579,7 @@
                        };
 
                        partition@3fc0000 {
+                               bootph-all;
                                label = "qspi.phypattern";
                                reg = <0x3fc0000 0x40000>;
                        };
@@ -602,6 +624,7 @@
 };
 
 &main_sdhci0 {
+       bootph-all;
        /* eMMC */
        status = "okay";
        non-removable;
@@ -610,6 +633,7 @@
 };
 
 &main_sdhci1 {
+       bootph-all;
        /* SD card */
        status = "okay";
        pinctrl-0 = <&main_mmc1_pins_default>;