arm64: dts: fsd: add ufs device node
authorAlim Akhtar <alim.akhtar@samsung.com>
Fri, 3 Jun 2022 15:47:14 +0000 (21:17 +0530)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Mon, 6 Jun 2022 08:39:55 +0000 (10:39 +0200)
Adds FSD ufs device node and enable the same for fsd platform.
This also adds the required pin configuration for the same.

Signed-off-by: Bharat Uppal <bharat.uppal@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220603154714.30532-8-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
arch/arm64/boot/dts/tesla/fsd-evb.dts
arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
arch/arm64/boot/dts/tesla/fsd.dtsi

index 5af560c1b5e6ace174921107ad09d14fa99fa140..1db6ddf03f01ec8fa36755b345d7222a33b0cbce 100644 (file)
@@ -37,3 +37,7 @@
 &serial_0 {
        status = "okay";
 };
+
+&ufs {
+       status = "okay";
+};
index d4d0cb0057122a722b31e84c0bef3ca30b3a69a3..387a41e251d58065a6d6b6db3821296976efb869 100644 (file)
                interrupt-controller;
                #interrupt-cells = <2>;
        };
+
+       ufs_rst_n: ufs-rst-n-pins {
+               samsung,pins = "gpf5-0";
+               samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+               samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+               samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>;
+       };
+
+       ufs_refclk_out: ufs-refclk-out-pins {
+               samsung,pins = "gpf5-1";
+               samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+               samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+               samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>;
+       };
 };
 
 &pinctrl_peric {
index 49a6f020102176e387b5fffcf70d92f1b1c82966..f35bc5a288c291638ff8ed9ec45a9e66369dec52 100644 (file)
                        clocks = <&fin_pll>, <&clock_imem IMEM_MCT_PCLK>;
                        clock-names = "fin_pll", "mct";
                };
+
+               ufs: ufs@15120000 {
+                       compatible = "tesla,fsd-ufs";
+                       reg = <0x0 0x15120000 0x0 0x200>,  /* 0: HCI standard */
+                             <0x0 0x15121100 0x0 0x200>,  /* 1: Vendor specified */
+                             <0x0 0x15110000 0x0 0x8000>,  /* 2: UNIPRO */
+                             <0x0 0x15130000 0x0 0x100>;  /* 3: UFS protector */
+                       reg-names = "hci", "vs_hci", "unipro", "ufsp";
+                       interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clock_fsys0 UFS0_TOP0_HCLK_BUS>,
+                                <&clock_fsys0 UFS0_TOP0_CLK_UNIPRO>;
+                       clock-names = "core_clk", "sclk_unipro_main";
+                       freq-table-hz = <0 0>, <0 0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
+                       phys = <&ufs_phy>;
+                       phy-names = "ufs-phy";
+                       status = "disabled";
+               };
+
+               ufs_phy: ufs-phy@15124000 {
+                       compatible = "tesla,fsd-ufs-phy";
+                       reg = <0x0 0x15124000 0x0 0x800>;
+                       reg-names = "phy-pma";
+                       samsung,pmu-syscon = <&pmu_system_controller>;
+                       #phy-cells = <0>;
+                       clocks = <&clock_fsys0 UFS0_MPHY_REFCLK_IXTAL26>;
+                       clock-names = "ref_clk";
+               };
        };
 };