PCI: Annotate pci_cache_line_size variables as __ro_after_init
authorHeiner Kallweit <hkallweit1@gmail.com>
Thu, 18 Apr 2024 18:29:21 +0000 (20:29 +0200)
committerBjorn Helgaas <bhelgaas@google.com>
Thu, 18 Apr 2024 18:46:19 +0000 (13:46 -0500)
Annotate both variables as __ro_after_init, enforcing that they can't be
changed after the init phase.

Link: https://lore.kernel.org/r/52fd058d-6d72-48db-8e61-5fcddcd0aa51@gmail.com
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
drivers/pci/pci.c

index e5f243dd428845a124da6df6419128cdcfee201d..9ee0d4e8808eb2fde7db5ca463edc11bc4be1d4b 100644 (file)
@@ -142,8 +142,8 @@ enum pcie_bus_config_types pcie_bus_config = PCIE_BUS_DEFAULT;
  * the dfl or actual value as it sees fit.  Don't forget this is
  * measured in 32-bit words, not bytes.
  */
-u8 pci_dfl_cache_line_size = L1_CACHE_BYTES >> 2;
-u8 pci_cache_line_size;
+u8 pci_dfl_cache_line_size __ro_after_init = L1_CACHE_BYTES >> 2;
+u8 pci_cache_line_size __ro_after_init ;
 
 /*
  * If we set up a device for bus mastering, we need to check the latency