arm64: dts: imx8mp: Adjust ECSPI1 pinmux on i.MX8M Plus DHCOM

The ECSPI1 is on I2C1/I2C2 pins of the SoC, update the pinmux accordingly.

Fixes: 8d6712695bc8e ("arm64: dts: imx8mp: Add support for DH electronics i.MX8M Plus DHCOM and PDK2")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
index a616eb3780025fe892953b416f46996c4871875f..52502eb6d3af8923e6148d3d669fe7e43cbc742e 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
@@ -70,7 +70,7 @@
 &ecspi1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_ecspi1>;
-       cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
+       cs-gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
        status = "disabled";
 };
 
@@ -648,10 +648,10 @@
 
        pinctrl_ecspi1: dhcom-ecspi1-grp {
                fsl,pins = <
-                       MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK           0x44
-                       MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI           0x44
-                       MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO           0x44
-                       MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09             0x40
+                       MX8MP_IOMUXC_I2C1_SCL__ECSPI1_SCLK              0x44
+                       MX8MP_IOMUXC_I2C1_SDA__ECSPI1_MOSI              0x44
+                       MX8MP_IOMUXC_I2C2_SCL__ECSPI1_MISO              0x44
+                       MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17               0x40
                >;
        };