firmware: arm_scmi: Check CLOCK_RATE_SET_COMPLETE async response

When CLOCK_RATE_SET command is issued in asynchronous mode the delayed
response CLOCK_RATE_SET_COMPLETE comes back once the SCMI platform has
effectively operated the requested change: such delayed response carries
also the clock ID and the final clock rate that has been set.

As an aid to debug issues, check that the clock ID in the delayed
response matches the expected one and debug print the rate value.

Link: https://lore.kernel.org/r/20220330150551.2573938-8-cristian.marussi@arm.com
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

diff --git a/drivers/firmware/arm_scmi/clock.c b/drivers/firmware/arm_scmi/clock.c
index 9f610206cbb8f3df9e15253703157c0c02628ef8..30d30ec8df94ff95667a47e89ad2a47ac10a5d3b 100644 (file)
--- a/drivers/firmware/arm_scmi/clock.c
+++ b/drivers/firmware/arm_scmi/clock.c
@@ -68,6 +68,12 @@ struct scmi_clock_set_rate {
        __le32 value_high;
 };
 
+struct scmi_msg_resp_set_rate_complete {
+       __le32 id;
+       __le32 rate_low;
+       __le32 rate_high;
+};
+
 struct clock_info {
        u32 version;
        int num_clocks;
@@ -266,10 +272,22 @@ static int scmi_clock_rate_set(const struct scmi_protocol_handle *ph,
        cfg->value_low = cpu_to_le32(rate & 0xffffffff);
        cfg->value_high = cpu_to_le32(rate >> 32);
 
-       if (flags & CLOCK_SET_ASYNC)
+       if (flags & CLOCK_SET_ASYNC) {
                ret = ph->xops->do_xfer_with_response(ph, t);
-       else
+               if (!ret) {
+                       struct scmi_msg_resp_set_rate_complete *resp;
+
+                       resp = t->rx.buf;
+                       if (le32_to_cpu(resp->id) == clk_id)
+                               dev_dbg(ph->dev,
+                                       "Clk ID %d set async to %llu\n", clk_id,
+                                       get_unaligned_le64(&resp->rate_low));
+                       else
+                               ret = -EPROTO;
+               }
+       } else {
                ret = ph->xops->do_xfer(ph, t);
+       }
 
        if (ci->max_async_req)
                atomic_dec(&ci->cur_async_req);