crypto: qat - add retrieval of fw capabilities

The QAT firmware provides a mechanism to retrieve its capabilities
through the init admin interface.

Add logic to retrieve the firmware capability mask from the firmware
through the init/admin channel. This mask reports if the
power management, telemetry and rate limiting features are supported.

The fw capabilities are stored in the accel_dev structure and are used
to detect if a certain feature is supported by the firmware loaded
in the device.

This is supported only by devices which have an admin AE.

Signed-off-by: Damian Muszynski <damian.muszynski@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Tero Kristo <tero.kristo@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h b/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h
index 1c11d90bd9f374dc95f44e365ac55bde5c96d1a9..908959288ce57224aedddc33609b44b9589fa846 100644 (file)
--- a/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h
+++ b/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h
@@ -253,6 +253,7 @@ struct adf_hw_device_data {
        u32 straps;
        u32 accel_capabilities_mask;
        u32 extended_dc_capabilities;
+       u16 fw_capabilities;
        u32 clock_frequency;
        u32 instance_id;
        u16 accel_mask;

diff --git a/drivers/crypto/intel/qat/qat_common/adf_admin.c b/drivers/crypto/intel/qat/qat_common/adf_admin.c
index 15ffda58233448f6bf8474bd8e3bad24efc5b63f..50e054ba2c339a1519e96628dd2489082091bdaa 100644 (file)
--- a/drivers/crypto/intel/qat/qat_common/adf_admin.c
+++ b/drivers/crypto/intel/qat/qat_common/adf_admin.c
@@ -310,6 +310,26 @@ static bool is_dcc_enabled(struct adf_accel_dev *accel_dev)
        return !strcmp(services, "dcc");
 }
 
+static int adf_get_fw_capabilities(struct adf_accel_dev *accel_dev, u16 *caps)
+{
+       u32 ae_mask = accel_dev->hw_device->admin_ae_mask;
+       struct icp_qat_fw_init_admin_resp resp = { };
+       struct icp_qat_fw_init_admin_req req = { };
+       int ret;
+
+       if (!ae_mask)
+               return 0;
+
+       req.cmd_id = ICP_QAT_FW_CAPABILITIES_GET;
+       ret = adf_send_admin(accel_dev, &req, &resp, ae_mask);
+       if (ret)
+               return ret;
+
+       *caps = resp.fw_capabilities;
+
+       return 0;
+}
+
 /**
  * adf_send_admin_init() - Function sends init message to FW
  * @accel_dev: Pointer to acceleration device.
@@ -320,6 +340,7 @@ static bool is_dcc_enabled(struct adf_accel_dev *accel_dev)
  */
 int adf_send_admin_init(struct adf_accel_dev *accel_dev)
 {
+       struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);
        u32 dc_capabilities = 0;
        int ret;
 
@@ -340,6 +361,8 @@ int adf_send_admin_init(struct adf_accel_dev *accel_dev)
        }
        accel_dev->hw_device->extended_dc_capabilities = dc_capabilities;
 
+       adf_get_fw_capabilities(accel_dev, &hw_data->fw_capabilities);
+
        return adf_init_ae(accel_dev);
 }
 EXPORT_SYMBOL_GPL(adf_send_admin_init);

diff --git a/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h b/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h
index 9e5ce419d8753ed836208af3d018403ca8868a26..e4de9a30e0bd1f534424962bca9f14dc90979ce9 100644 (file)
--- a/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h
+++ b/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h
@@ -16,6 +16,7 @@ enum icp_qat_fw_init_admin_cmd_id {
        ICP_QAT_FW_HEARTBEAT_SYNC = 7,
        ICP_QAT_FW_HEARTBEAT_GET = 8,
        ICP_QAT_FW_COMP_CAPABILITY_GET = 9,
+       ICP_QAT_FW_CRYPTO_CAPABILITY_GET = 10,
        ICP_QAT_FW_DC_CHAIN_INIT = 11,
        ICP_QAT_FW_HEARTBEAT_TIMER_SET = 13,
        ICP_QAT_FW_TIMER_GET = 19,
@@ -109,10 +110,12 @@ struct icp_qat_fw_init_admin_resp {
                        __u32 unsuccessful_count;
                        __u64 resrvd8;
                };
+               __u16 fw_capabilities;
        };
 } __packed;
 
 #define ICP_QAT_FW_SYNC ICP_QAT_FW_HEARTBEAT_SYNC
+#define ICP_QAT_FW_CAPABILITIES_GET ICP_QAT_FW_CRYPTO_CAPABILITY_GET
 
 #define ICP_QAT_NUMBER_OF_PM_EVENTS 8