clk: renesas: rzg2l: Fix typo in struct rzg2l_cpg_priv kerneldoc
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Wed, 26 Oct 2022 01:21:23 +0000 (02:21 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 26 Oct 2022 10:38:01 +0000 (12:38 +0200)
Fix typo pll5_mux_dsi_div_params -> mux_dsi_div_params

Fixes the below warning (make W=1):

    drivers/clk/renesas/rzg2l-cpg.c:115: warning: Function parameter or member 'mux_dsi_div_params' not described in 'rzg2l_cpg_priv'

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20221026012123.159790-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/rzg2l-cpg.c

index be4868fa3971e3b7090d976dbe9ca49569a7eecd..dfd676310ce9191521273805b0c6b04d60108699 100644 (file)
@@ -95,7 +95,7 @@ struct rzg2l_pll5_mux_dsi_div_param {
  * @num_resets: Number of Module Resets in info->resets[]
  * @last_dt_core_clk: ID of the last Core Clock exported to DT
  * @info: Pointer to platform data
- * @pll5_mux_dsi_div_params: pll5 mux and dsi div parameters
+ * @mux_dsi_div_params: pll5 mux and dsi div parameters
  */
 struct rzg2l_cpg_priv {
        struct reset_controller_dev rcdev;