};
etzpc: bus@5c007000 {
- compatible = "simple-bus";
+ compatible = "st,stm32-etzpc", "simple-bus";
reg = <0x5c007000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
+ #access-controller-cells = <1>;
ranges;
adc_2: adc@48004000 {
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ access-controllers = <&etzpc 33>;
status = "disabled";
adc2: adc@0 {
dr_mode = "otg";
otg-rev = <0x200>;
usb33d-supply = <&scmi_usb33>;
+ access-controllers = <&etzpc 34>;
status = "disabled";
};
dmas = <&dmamux1 41 0x400 0x5>,
<&dmamux1 42 0x400 0x1>;
dma-names = "rx", "tx";
+ access-controllers = <&etzpc 16>;
status = "disabled";
};
dmas = <&dmamux1 43 0x400 0x5>,
<&dmamux1 44 0x400 0x1>;
dma-names = "rx", "tx";
+ access-controllers = <&etzpc 17>;
status = "disabled";
};
dmas = <&dmamux1 83 0x400 0x01>,
<&dmamux1 84 0x400 0x01>;
dma-names = "rx", "tx";
+ access-controllers = <&etzpc 13>;
status = "disabled";
};
dmas = <&dmamux1 83 0x400 0x01>,
<&dmamux1 84 0x400 0x01>;
dma-names = "rx", "tx";
+ access-controllers = <&etzpc 18>;
status = "disabled";
};
dmas = <&dmamux1 85 0x400 0x01>,
<&dmamux1 86 0x400 0x01>;
dma-names = "rx", "tx";
+ access-controllers = <&etzpc 19>;
status = "disabled";
};
dma-names = "rx", "tx";
st,syscfg-fmp = <&syscfg 0x4 0x4>;
i2c-analog-filter;
+ access-controllers = <&etzpc 20>;
status = "disabled";
};
dma-names = "rx", "tx";
st,syscfg-fmp = <&syscfg 0x4 0x8>;
i2c-analog-filter;
+ access-controllers = <&etzpc 21>;
status = "disabled";
};
dma-names = "rx", "tx";
st,syscfg-fmp = <&syscfg 0x4 0x10>;
i2c-analog-filter;
+ access-controllers = <&etzpc 22>;
status = "disabled";
};
interrupt-names = "global";
clocks = <&rcc TIM12_K>;
clock-names = "int";
+ access-controllers = <&etzpc 23>;
status = "disabled";
pwm {
interrupt-names = "global";
clocks = <&rcc TIM13_K>;
clock-names = "int";
+ access-controllers = <&etzpc 24>;
status = "disabled";
pwm {
interrupt-names = "global";
clocks = <&rcc TIM14_K>;
clock-names = "int";
+ access-controllers = <&etzpc 25>;
status = "disabled";
pwm {
<&dmamux1 107 0x400 0x1>,
<&dmamux1 108 0x400 0x1>;
dma-names = "ch1", "up", "trig", "com";
+ access-controllers = <&etzpc 26>;
status = "disabled";
pwm {
dmas = <&dmamux1 109 0x400 0x1>,
<&dmamux1 110 0x400 0x1>;
dma-names = "ch1", "up";
+ access-controllers = <&etzpc 27>;
status = "disabled";
pwm {
dmas = <&dmamux1 111 0x400 0x1>,
<&dmamux1 112 0x400 0x1>;
dma-names = "ch1", "up";
+ access-controllers = <&etzpc 28>;
status = "disabled";
pwm {
clocks = <&rcc LPTIM2_K>;
clock-names = "mux";
wakeup-source;
+ access-controllers = <&etzpc 1>;
status = "disabled";
pwm {
clocks = <&rcc LPTIM3_K>;
clock-names = "mux";
wakeup-source;
+ access-controllers = <&etzpc 2>;
status = "disabled";
pwm {
resets = <&rcc HASH1_R>;
dmas = <&mdma 30 0x2 0x1000a02 0x0 0x0>;
dma-names = "in";
+ access-controllers = <&etzpc 41>;
status = "disabled";
};
reg = <0x54004000 0x400>;
clocks = <&rcc RNG1_K>;
resets = <&rcc RNG1_R>;
+ access-controllers = <&etzpc 40>;
status = "disabled";
};
#size-cells = <1>;
clocks = <&rcc FMC_K>;
resets = <&rcc FMC_R>;
+ access-controllers = <&etzpc 54>;
status = "disabled";
nand-controller@4,0 {
dma-names = "tx", "rx";
clocks = <&rcc QSPI_K>;
resets = <&rcc QSPI_R>;
+ access-controllers = <&etzpc 55>;
status = "disabled";
};
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <130000000>;
+ access-controllers = <&etzpc 50>;
status = "disabled";
};
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <130000000>;
+ access-controllers = <&etzpc 51>;
status = "disabled";
};
resets = <&rcc USBPHY_R>;
vdda1v1-supply = <&scmi_reg11>;
vdda1v8-supply = <&scmi_reg18>;
+ access-controllers = <&etzpc 5>;
status = "disabled";
usbphyc_port0: usb-phy@0 {