ARM: dts: stm32: Add DHCOR based Testbench board

Add DT for DHCOR Testbench board, which is a testbench for testing of
DHCOR SoM during manufacturing. This is effectively a trimmed down
version of AV96 board with CSI-2 bridge, HDMI bridge, WiFi, Audio and
LEDs removed and used as GPIOs instead. Furthermore, the PMIC Buck3
is always configured from PMIC NVM to cater for both 1V8 and 3V3 SoM
variant.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 6aa7dc4db2fc8affeed2f5c201d56e7e097ecc8a..3a4099ad59b4a9bcedaaedfe1ca9155fc0d432a4 100644 (file)
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1214,6 +1214,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
        stm32mp151a-prtt1a.dtb \
        stm32mp151a-prtt1c.dtb \
        stm32mp151a-prtt1s.dtb \
+       stm32mp151a-dhcor-testbench.dtb \
        stm32mp153c-dhcom-drc02.dtb \
        stm32mp153c-dhcor-drc-compact.dtb \
        stm32mp157a-avenger96.dtb \

diff --git a/arch/arm/boot/dts/stm32mp151a-dhcor-testbench.dts b/arch/arm/boot/dts/stm32mp151a-dhcor-testbench.dts
new file mode 100644 (file)
index 0000000..e0f828e
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp151a-dhcor-testbench.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright (C) 2022 Marek Vasut <marex@denx.de>
+ */
+
+/dts-v1/;
+
+#include "stm32mp151.dtsi"
+#include "stm32mp15xx-dhcor-som.dtsi"
+#include "stm32mp15xx-dhcor-testbench.dtsi"
+
+/ {
+       model = "DH electronics STM32MP151A DHCOR Testbench";
+       compatible = "dh,stm32mp151a-dhcor-testbench",
+                    "dh,stm32mp151a-dhcor-som",
+                    "st,stm32mp151";
+};

diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcor-testbench.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcor-testbench.dtsi
new file mode 100644 (file)
index 0000000..c7dcee4
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp15xx-dhcor-testbench.dtsi
@@ -0,0 +1,171 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright (C) 2022 Marek Vasut <marex@denx.de>
+ */
+
+/ {
+       aliases {
+               ethernet0 = &ethernet0;
+               mmc0 = &sdmmc1;
+               mmc1 = &sdmmc2;
+               serial0 = &uart4;
+               serial1 = &uart7;
+               spi0 = &qspi;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       sd_switch: regulator-sd_switch {
+               compatible = "regulator-gpio";
+               regulator-name = "sd_switch";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <2900000>;
+               regulator-type = "voltage";
+               regulator-always-on;
+
+               gpios = <&gpioi 5 GPIO_ACTIVE_HIGH>;
+               gpios-states = <0>;
+               states = <1800000 0x1>,
+                        <2900000 0x0>;
+       };
+};
+
+&adc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&adc12_ain_pins_b>;
+       vdd-supply = <&vdd>;
+       vdda-supply = <&vdda>;
+       vref-supply = <&vdda>;
+       status = "okay";
+
+       adc1: adc@0 {
+               st,adc-channels = <0 1 6>;
+               st,min-sample-time-nsecs = <5000>;
+               status = "okay";
+       };
+
+       adc2: adc@100 {
+               st,adc-channels = <0 1 2>;
+               st,min-sample-time-nsecs = <5000>;
+               status = "okay";
+       };
+};
+
+&ethernet0 {
+       status = "okay";
+       pinctrl-0 = <&ethernet0_rgmii_pins_c>;
+       pinctrl-1 = <&ethernet0_rgmii_sleep_pins_c>;
+       pinctrl-names = "default", "sleep";
+       phy-mode = "rgmii";
+       max-speed = <1000>;
+       phy-handle = <&phy0>;
+
+       mdio0 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "snps,dwmac-mdio";
+               reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
+               reset-delay-us = <1000>;
+               reset-post-delay-us = <1000>;
+
+               phy0: ethernet-phy@7 {
+                       reg = <7>;
+
+                       rxc-skew-ps = <1500>;
+                       rxdv-skew-ps = <540>;
+                       rxd0-skew-ps = <420>;
+                       rxd1-skew-ps = <420>;
+                       rxd2-skew-ps = <420>;
+                       rxd3-skew-ps = <420>;
+
+                       txc-skew-ps = <1440>;
+                       txen-skew-ps = <540>;
+                       txd0-skew-ps = <420>;
+                       txd1-skew-ps = <420>;
+                       txd2-skew-ps = <420>;
+                       txd3-skew-ps = <420>;
+               };
+       };
+};
+
+&sdmmc1 {
+       pinctrl-names = "default", "opendrain", "sleep";
+       pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_b>;
+       pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_b>;
+       pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_b>;
+       cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+       disable-wp;
+       st,sig-dir;
+       st,neg-edge;
+       st,use-ckin;
+       bus-width = <4>;
+       vmmc-supply = <&vdd_sd>;
+       vqmmc-supply = <&sd_switch>;
+       status = "okay";
+};
+
+&sdmmc2 {
+       pinctrl-names = "default", "opendrain", "sleep";
+       pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_c>;
+       pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_c>;
+       pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_c>;
+       bus-width = <8>;
+       mmc-ddr-1_8v;
+       no-sd;
+       no-sdio;
+       non-removable;
+       st,neg-edge;
+       vmmc-supply = <&v3v3>;
+       vqmmc-supply = <&v3v3>;
+       status = "okay";
+};
+
+&uart4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart4_pins_b>;
+       /delete-property/dmas;
+       /delete-property/dma-names;
+       status = "okay";
+};
+
+&uart7 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart7_pins_a>;
+       uart-has-rtscts;
+       /delete-property/dmas;
+       /delete-property/dma-names;
+       status = "okay";
+};
+
+&usbh_ehci {
+       phys = <&usbphyc_port0>;
+       status = "okay";
+};
+
+&usbh_ohci {
+       phys = <&usbphyc_port0>;
+       status = "okay";
+};
+
+&usbotg_hs {
+       pinctrl-0 = <&usbotg_hs_pins_a>;
+       pinctrl-names = "default";
+       phy-names = "usb2-phy";
+       phys = <&usbphyc_port1 0>;
+       status = "okay";
+       vbus-supply = <&vbus_otg>;
+};
+
+&usbphyc {
+       status = "okay";
+};
+
+&usbphyc_port0 {
+       phy-supply = <&vdd_usb>;
+};
+
+&usbphyc_port1 {
+       phy-supply = <&vdd_usb>;
+};