docs: Add skeletal documentation of highbank and midway
authorPeter Maydell <peter.maydell@linaro.org>
Tue, 13 Jul 2021 14:22:26 +0000 (15:22 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Sun, 18 Jul 2021 09:59:47 +0000 (10:59 +0100)
Add skeletal documentation for the highbank and midway machines.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210713142226.19155-4-peter.maydell@linaro.org

MAINTAINERS
docs/system/arm/highbank.rst [new file with mode: 0644]
docs/system/target-arm.rst

index 1504951823ff128904e482e103ddfb934767d31b..4256ad1adbb2d2e4c0b8506a78fd8dffa0bf6710 100644 (file)
@@ -643,6 +643,7 @@ L: qemu-arm@nongnu.org
 S: Odd Fixes
 F: hw/arm/highbank.c
 F: hw/net/xgmac.c
+F: docs/system/arm/highbank.rst
 
 Canon DIGIC
 M: Antony Pavlov <antonynpavlov@gmail.com>
diff --git a/docs/system/arm/highbank.rst b/docs/system/arm/highbank.rst
new file mode 100644 (file)
index 0000000..bb4965b
--- /dev/null
@@ -0,0 +1,19 @@
+Calxeda Highbank and Midway (``highbank``, ``midway``)
+======================================================
+
+``highbank`` is a model of the Calxeda Highbank (ECX-1000) system,
+which has four Cortex-A9 cores.
+
+``midway`` is a model of the Calxeda Midway (ECX-2000) system,
+which has four Cortex-A15 cores.
+
+Emulated devices:
+
+- L2x0 cache controller
+- SP804 dual timer
+- PL011 UART
+- PL061 GPIOs
+- PL031 RTC
+- PL022 synchronous serial port controller
+- AHCI
+- XGMAC ethernet controllers
index c52902acdaddbf11514cbe071675090c999e3f2b..c0c2585c0ad336aebe5dc0788ef9f37e8817ed88 100644 (file)
@@ -87,6 +87,7 @@ undocumented; you can get a complete list by running
    arm/digic
    arm/cubieboard
    arm/emcraft-sf2
+   arm/highbank
    arm/musicpal
    arm/gumstix
    arm/nrf