dt-bindings: soc: qcom: merge qcom,saw2.txt into qcom,spm.yaml
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tue, 2 Jan 2024 05:17:21 +0000 (07:17 +0200)
committerBjorn Andersson <andersson@kernel.org>
Fri, 16 Feb 2024 17:30:57 +0000 (11:30 -0600)
The Qualcomm SPM / SAW2 device is described in two bindigns files:
arm/msm/qcom,saw2.txt and soc/qcom/qcom,spm.yaml. Merge the former into
the latter, adding detailed device node description. While we are at it,
also rename qcom,spm.yaml to qcom,saw2.yaml to follow the actual
compatible used for these devices.

The regulator property is retained as is. It will be changed in the
later patches.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240102-saw2-spm-regulator-v7-1-0472ec237f49@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt [deleted file]
Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml [new file with mode: 0644]
Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml [deleted file]

diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt b/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt
deleted file mode 100644 (file)
index c0e3c3a..0000000
+++ /dev/null
@@ -1,58 +0,0 @@
-SPM AVS Wrapper 2 (SAW2)
-
-The SAW2 is a wrapper around the Subsystem Power Manager (SPM) and the
-Adaptive Voltage Scaling (AVS) hardware. The SPM is a programmable
-power-controller that transitions a piece of hardware (like a processor or
-subsystem) into and out of low power modes via a direct connection to
-the PMIC. It can also be wired up to interact with other processors in the
-system, notifying them when a low power state is entered or exited.
-
-Multiple revisions of the SAW hardware are supported using these Device Nodes.
-SAW2 revisions differ in the register offset and configuration data. Also, the
-same revision of the SAW in different SoCs may have different configuration
-data due the differences in hardware capabilities. Hence the SoC name, the
-version of the SAW hardware in that SoC and the distinction between cpu (big
-or Little) or cache, may be needed to uniquely identify the SAW register
-configuration and initialization data. The compatible string is used to
-indicate this parameter.
-
-PROPERTIES
-
-- compatible:
-       Usage: required
-       Value type: <string>
-       Definition: Must have
-                       "qcom,saw2"
-                   A more specific value could be one of:
-                       "qcom,apq8064-saw2-v1.1-cpu"
-                       "qcom,msm8226-saw2-v2.1-cpu"
-                       "qcom,msm8974-saw2-v2.1-cpu"
-                       "qcom,apq8084-saw2-v2.1-cpu"
-
-- reg:
-       Usage: required
-       Value type: <prop-encoded-array>
-       Definition: the first element specifies the base address and size of
-                   the register region. An optional second element specifies
-                   the base address and size of the alias register region.
-
-- regulator:
-       Usage: optional
-       Value type: boolean
-       Definition: Indicates that this SPM device acts as a regulator device
-                       device for the core (CPU or Cache) the SPM is attached
-                       to.
-
-Example 1:
-
-       power-controller@2099000 {
-               compatible = "qcom,saw2";
-               reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
-               regulator;
-       };
-
-Example 2:
-       saw0: power-controller@f9089000 {
-               compatible = "qcom,apq8084-saw2-v2.1-cpu", "qcom,saw2";
-               reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>;
-       };
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml
new file mode 100644 (file)
index 0000000..84b3f01
--- /dev/null
@@ -0,0 +1,99 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/qcom/qcom,saw2.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Subsystem Power Manager / SPM AVS Wrapper 2 (SAW2)
+
+maintainers:
+  - Andy Gross <agross@kernel.org>
+  - Bjorn Andersson <bjorn.andersson@linaro.org>
+
+description: |
+  The Qualcomm Subsystem Power Manager is used to control the peripheral logic
+  surrounding the application cores in Qualcomm platforms.
+
+  The SAW2 is a wrapper around the Subsystem Power Manager (SPM) and the
+  Adaptive Voltage Scaling (AVS) hardware. The SPM is a programmable
+  power-controller that transitions a piece of hardware (like a processor or
+  subsystem) into and out of low power modes via a direct connection to
+  the PMIC. It can also be wired up to interact with other processors in the
+  system, notifying them when a low power state is entered or exited.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - qcom,sdm660-gold-saw2-v4.1-l2
+          - qcom,sdm660-silver-saw2-v4.1-l2
+          - qcom,msm8998-gold-saw2-v4.1-l2
+          - qcom,msm8998-silver-saw2-v4.1-l2
+          - qcom,msm8909-saw2-v3.0-cpu
+          - qcom,msm8916-saw2-v3.0-cpu
+          - qcom,msm8939-saw2-v3.0-cpu
+          - qcom,msm8226-saw2-v2.1-cpu
+          - qcom,msm8974-saw2-v2.1-cpu
+          - qcom,msm8976-gold-saw2-v2.3-l2
+          - qcom,msm8976-silver-saw2-v2.3-l2
+          - qcom,apq8084-saw2-v2.1-cpu
+          - qcom,apq8064-saw2-v1.1-cpu
+      - const: qcom,saw2
+
+  reg:
+    items:
+      - description: Base address and size of the SPM register region
+      - description: Base address and size of the alias register region
+    minItems: 1
+
+  regulator:
+    type: boolean
+    description: Indicates that this SPM device acts as a regulator device
+      device for the core (CPU or Cache) the SPM is attached to.
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+
+    /* Example 1: SoC using SAW2 and kpss-acc-v2 CPUIdle */
+    cpus {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        cpu@0 {
+            compatible = "qcom,kryo";
+            device_type = "cpu";
+            enable-method = "qcom,kpss-acc-v2";
+            qcom,saw = <&saw0>;
+            reg = <0x0>;
+            operating-points-v2 = <&cpu_opp_table>;
+        };
+    };
+
+    saw0: power-manager@f9089000 {
+        compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
+        reg = <0xf9089000 0x1000>;
+    };
+
+  - |
+
+    /*
+     * Example 2: New-gen multi cluster SoC using SAW only for L2;
+     * This does not require any cpuidle driver, nor any cpu phandle.
+     */
+    power-manager@17812000 {
+        compatible = "qcom,msm8998-gold-saw2-v4.1-l2", "qcom,saw2";
+        reg = <0x17812000 0x1000>;
+    };
+
+    power-manager@17912000 {
+        compatible = "qcom,msm8998-silver-saw2-v4.1-l2", "qcom,saw2";
+        reg = <0x17912000 0x1000>;
+    };
+
+...
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml
deleted file mode 100644 (file)
index 20c8cd3..0000000
+++ /dev/null
@@ -1,85 +0,0 @@
-# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/soc/qcom/qcom,spm.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Qualcomm Subsystem Power Manager
-
-maintainers:
-  - Andy Gross <agross@kernel.org>
-  - Bjorn Andersson <bjorn.andersson@linaro.org>
-
-description: |
-  This binding describes the Qualcomm Subsystem Power Manager, used to control
-  the peripheral logic surrounding the application cores in Qualcomm platforms.
-
-properties:
-  compatible:
-    items:
-      - enum:
-          - qcom,sdm660-gold-saw2-v4.1-l2
-          - qcom,sdm660-silver-saw2-v4.1-l2
-          - qcom,msm8998-gold-saw2-v4.1-l2
-          - qcom,msm8998-silver-saw2-v4.1-l2
-          - qcom,msm8909-saw2-v3.0-cpu
-          - qcom,msm8916-saw2-v3.0-cpu
-          - qcom,msm8939-saw2-v3.0-cpu
-          - qcom,msm8226-saw2-v2.1-cpu
-          - qcom,msm8974-saw2-v2.1-cpu
-          - qcom,msm8976-gold-saw2-v2.3-l2
-          - qcom,msm8976-silver-saw2-v2.3-l2
-          - qcom,apq8084-saw2-v2.1-cpu
-          - qcom,apq8064-saw2-v1.1-cpu
-      - const: qcom,saw2
-
-  reg:
-    description: Base address and size of the SPM register region
-    maxItems: 1
-
-required:
-  - compatible
-  - reg
-
-additionalProperties: false
-
-examples:
-  - |
-
-    /* Example 1: SoC using SAW2 and kpss-acc-v2 CPUIdle */
-    cpus {
-        #address-cells = <1>;
-        #size-cells = <0>;
-
-        cpu@0 {
-            compatible = "qcom,kryo";
-            device_type = "cpu";
-            enable-method = "qcom,kpss-acc-v2";
-            qcom,saw = <&saw0>;
-            reg = <0x0>;
-            operating-points-v2 = <&cpu_opp_table>;
-        };
-    };
-
-    saw0: power-manager@f9089000 {
-        compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
-        reg = <0xf9089000 0x1000>;
-    };
-
-  - |
-
-    /*
-     * Example 2: New-gen multi cluster SoC using SAW only for L2;
-     * This does not require any cpuidle driver, nor any cpu phandle.
-     */
-    power-manager@17812000 {
-        compatible = "qcom,msm8998-gold-saw2-v4.1-l2", "qcom,saw2";
-        reg = <0x17812000 0x1000>;
-    };
-
-    power-manager@17912000 {
-        compatible = "qcom,msm8998-silver-saw2-v4.1-l2", "qcom,saw2";
-        reg = <0x17912000 0x1000>;
-    };
-
-...