x86/hyperv: Set MTRR state when running as SEV-SNP Hyper-V guest
authorJuergen Gross <jgross@suse.com>
Tue, 2 May 2023 12:09:19 +0000 (14:09 +0200)
committerBorislav Petkov (AMD) <bp@alien8.de>
Thu, 1 Jun 2023 13:04:32 +0000 (15:04 +0200)
In order to avoid mappings using the UC- cache attribute, set the
MTRR state to use WB caching as the default.

This is needed in order to cope with the fact that PAT is enabled,
while MTRRs are not supported by the hypervisor.

Fixes: 90b926e68f50 ("x86/pat: Fix pat_x_mtrr_type() for MTRR disabled case")
Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Tested-by: Michael Kelley <mikelley@microsoft.com>
Link: https://lore.kernel.org/r/20230502120931.20719-5-jgross@suse.com
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
arch/x86/hyperv/ivm.c

index cc92388b7a999f9fde40d8691e3141eb3da984a6..6f7c1b5606ad4d5ff643db8a695ddf4933736818 100644 (file)
@@ -17,6 +17,7 @@
 #include <asm/mem_encrypt.h>
 #include <asm/mshyperv.h>
 #include <asm/hypervisor.h>
+#include <asm/mtrr.h>
 
 #ifdef CONFIG_AMD_MEM_ENCRYPT
 
@@ -372,6 +373,9 @@ void __init hv_vtom_init(void)
        x86_platform.guest.enc_cache_flush_required = hv_vtom_cache_flush_required;
        x86_platform.guest.enc_tlb_flush_required = hv_vtom_tlb_flush_required;
        x86_platform.guest.enc_status_change_finish = hv_vtom_set_host_visibility;
+
+       /* Set WB as the default cache mode. */
+       mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK);
 }
 
 #endif /* CONFIG_AMD_MEM_ENCRYPT */