int i_PatternTransitionCount = 0, i_RegValue;
        int i;
 
-      /*************************************************/
        /* Selects the master interrupt control register */
-      /*************************************************/
        outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-      /**********************************************/
        /* Disables  the main interrupt on the board */
-      /**********************************************/
        outb(0x00, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 
        if (data[0] == 1) {
        }                       /* for (i_Count = i_MaxChannel; i_Count >0;i_Count --) */
 
        if (data[0] == 1) {
-                   /****************************/
                /* Test the interrupt logic */
-                   /****************************/
 
                if (data[1] == APCI1500_AND ||
                        data[1] == APCI1500_OR ||
                        data[1] == APCI1500_OR_PRIORITY) {
-                      /**************************************/
                        /* Tests if a transition was declared */
                        /* for a OR PRIORITY logic            */
-                      /**************************************/
 
                        if (data[1] == APCI1500_OR_PRIORITY
                                && i_PatternTransition != 0) {
                                return -EINVAL;
                        }       /*  if (data[1]== APCI1500_OR_PRIORITY && i_PatternTransition != 0) */
 
-                      /*************************************/
                        /* Tests if more than one transition */
                        /* was declared for an AND logic     */
-                      /*************************************/
 
                        if (data[1] == APCI1500_AND) {
                                for (i_Count = 0; i_Count < 8; i_Count++) {
                                }       /*  if (i_PatternTransitionCount > 1) */
                        }       /*  if (data[1]== APCI1500_AND) */
 
-                           /*****************************************************************/
                        /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
-                           /*****************************************************************/
                        outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
-                       /******************/
                        /* Disable Port A */
-                           /******************/
                        outb(0xF0,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
-                       /**********************************************/
                        /* Selects the polarity register of port 1    */
-                           /**********************************************/
                        outb(APCI1500_RW_PORT_A_PATTERN_POLARITY,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
 
-                       /*********************************************/
                        /* Selects the pattern mask register of      */
                        /* port 1                                    */
-                           /*********************************************/
                        outb(APCI1500_RW_PORT_A_PATTERN_MASK,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                        outb(i_PatternMask,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
-                       /********************************************/
                        /* Selects the pattern transition register  */
                        /* of port 1                                */
-                           /********************************************/
                        outb(APCI1500_RW_PORT_A_PATTERN_TRANSITION,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
 
-                     /******************************************/
                        /* Selects the mode specification mask    */
                        /* register of port 1                     */
-                         /******************************************/
                        outb(APCI1500_RW_PORT_A_SPECIFICATION,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                                inb(devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
 
-                     /******************************************/
                        /* Selects the mode specification mask    */
                        /* register of port 1                     */
-                         /******************************************/
                        outb(APCI1500_RW_PORT_A_SPECIFICATION,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
 
-                     /**********************/
                        /* Port A new mode    */
-                         /**********************/
 
                        i_RegValue = (i_RegValue & 0xF9) | data[1] | 0x9;
                        outb(i_RegValue,
 
                        i_Event1Status = 1;
 
-                     /*****************************************************************/
                        /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
-                         /*****************************************************************/
 
                        outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
-                     /*****************/
                        /* Enable Port A */
-                         /*****************/
                        outb(0xF4,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                }               /*  else }// if(data[1]==APCI1500_AND||data[1]==APCI1500_OR||data[1]==APCI1500_OR_PRIORITY) */
        }                       /*    if (data[0]== 1) */
 
-                /************************************/
        /* Test if event setting for port 2 */
-                /************************************/
 
        if (data[0] == 2) {
-                   /************************/
                /* Test the event logic */
-                   /************************/
 
                if (data[1] == APCI1500_OR) {
-                      /*****************************************************************/
                        /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
-                      /*****************************************************************/
                        outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
-                      /******************/
                        /* Disable Port B */
-                      /******************/
                        outb(0x74,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
-                      /****************************************/
                        /* Selects the mode specification mask  */
                        /* register of port B                   */
-                      /****************************************/
                        outb(APCI1500_RW_PORT_B_SPECIFICATION,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                                inb(devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
 
-                      /******************************************/
                        /* Selects the mode specification mask    */
                        /* register of port B                     */
-                      /******************************************/
                        outb(APCI1500_RW_PORT_B_SPECIFICATION,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
 
-                      /**********************************/
                        /* Selects error channels 1 and 2 */
-                      /**********************************/
 
                        i_PatternMask = (i_PatternMask | 0xC0);
                        i_PatternPolarity = (i_PatternPolarity | 0xC0);
                        i_PatternTransition = (i_PatternTransition | 0xC0);
 
-                      /**********************************************/
                        /* Selects the polarity register of port 2    */
-                      /**********************************************/
                        outb(APCI1500_RW_PORT_B_PATTERN_POLARITY,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                        outb(i_PatternPolarity,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
-                      /**********************************************/
                        /* Selects the pattern transition register    */
                        /* of port 2                                  */
-                      /**********************************************/
                        outb(APCI1500_RW_PORT_B_PATTERN_TRANSITION,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                        outb(i_PatternTransition,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
-                      /**********************************************/
                        /* Selects the pattern Mask register    */
                        /* of port 2                                  */
-                      /**********************************************/
 
                        outb(APCI1500_RW_PORT_B_PATTERN_MASK,
                                devpriv->iobase +
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
 
-                      /******************************************/
                        /* Selects the mode specification mask    */
                        /* register of port 2                     */
-                      /******************************************/
                        outb(APCI1500_RW_PORT_B_SPECIFICATION,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                        i_RegValue =
                                inb(devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
-                      /******************************************/
                        /* Selects the mode specification mask    */
                        /* register of port 2                     */
-                      /******************************************/
                        outb(APCI1500_RW_PORT_B_SPECIFICATION,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                                APCI1500_Z8536_CONTROL_REGISTER);
 
                        i_Event2Status = 1;
-                      /*****************************************************************/
                        /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
-                      /*****************************************************************/
 
                        outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
-                      /*****************/
                        /* Enable Port B */
-                      /*****************/
 
                        outb(0xF4,
                                devpriv->iobase +
 
        switch (data[0]) {
        case START:
-             /*************************/
                /* Tests the port number */
-             /*************************/
 
                if (data[1] == 1 || data[1] == 2) {
-                 /***************************/
                        /* Test if port 1 selected */
-                 /***************************/
 
                        if (data[1] == 1) {
-                   /*****************************/
                                /* Test if event initialised */
-                   /*****************************/
                                if (i_Event1Status == 1) {
-                      /*****************************************************************/
                                        /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
-                      /*****************************************************************/
                                        outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-                      /******************/
                                        /* Disable Port A */
-                      /******************/
                                        outb(0xF0,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
-                      /***************************************************/
                                        /* Selects the command and status register of      */
                                        /* port 1                                          */
-                      /***************************************************/
                                        outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-                      /*************************************/
                                        /* Allows the pattern interrupt      */
-                      /*************************************/
                                        outb(0xC0,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
-                      /*****************************************************************/
                                        /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
-                      /*****************************************************************/
                                        outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-                      /*****************/
                                        /* Enable Port A */
-                      /*****************/
                                        outb(0xF4,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
                                                APCI1500_Z8536_CONTROL_REGISTER);
 
                                        /* Selects the master interrupt control register */
-                      /*************************************************/
                                        outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-                      /**********************************************/
                                        /* Authorizes the main interrupt on the board */
-                      /**********************************************/
                                        outb(0xD0,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
                        if (data[1] == 2) {
 
                                if (i_Event2Status == 1) {
-                           /*****************************************************************/
                                        /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
-                           /*****************************************************************/
                                        outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-                      /******************/
                                        /* Disable Port B */
-                      /******************/
                                        outb(0x74,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
-                      /***************************************************/
                                        /* Selects the command and status register of      */
                                        /* port 2                                          */
-                      /***************************************************/
                                        outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-                      /*************************************/
                                        /* Allows the pattern interrupt      */
-                      /*************************************/
                                        outb(0xC0,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
-                      /*****************************************************************/
                                        /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
-                      /*****************************************************************/
                                        outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-                      /*****************/
                                        /* Enable Port B */
-                      /*****************/
                                        outb(0xF4,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
 
                                        /* Selects the master interrupt control register */
-                      /*************************************************/
                                        outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-                      /**********************************************/
                                        /* Authorizes the main interrupt on the board */
-                      /**********************************************/
                                        outb(0xD0,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
                break;
 
        case STOP:
-                 /*************************/
                /* Tests the port number */
-                 /*************************/
 
                if (data[1] == 1 || data[1] == 2) {
-                 /***************************/
                        /* Test if port 1 selected */
-                 /***************************/
 
                        if (data[1] == 1) {
-                   /*****************************/
                                /* Test if event initialised */
-                   /*****************************/
                                if (i_Event1Status == 1) {
-                      /*****************************************************************/
                                        /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
-                      /*****************************************************************/
                                        outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-                      /******************/
                                        /* Disable Port A */
-                      /******************/
                                        outb(0xF0,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
-                      /***************************************************/
                                        /* Selects the command and status register of      */
                                        /* port 1                                          */
-                      /***************************************************/
                                        outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-                      /*************************************/
                                        /* Inhibits the pattern interrupt      */
-                      /*************************************/
                                        outb(0xE0,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
-                      /*****************************************************************/
                                        /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
-                      /*****************************************************************/
                                        outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-                      /*****************/
                                        /* Enable Port A */
-                      /*****************/
                                        outb(0xF4,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
                                }       /* else if(i_Event1Status==1) */
                        }       /* if (data[1]==1) */
                        if (data[1] == 2) {
-                        /*****************************/
                                /* Test if event initialised */
-                        /*****************************/
                                if (i_Event2Status == 1) {
-                         /*****************************************************************/
                                        /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
-                         /*****************************************************************/
                                        outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-                         /******************/
                                        /* Disable Port B */
-                         /******************/
                                        outb(0x74,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
-                         /***************************************************/
                                        /* Selects the command and status register of      */
                                        /* port 2                                         */
-                         /***************************************************/
                                        outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-                      /*************************************/
                                        /* Inhibits the pattern interrupt      */
-                      /*************************************/
                                        outb(0xE0,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
-                      /*****************************************************************/
                                        /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
-                      /*****************************************************************/
                                        outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-                      /*****************/
                                        /* Enable Port B */
-                      /*****************/
                                        outb(0xF4,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
        struct addi_private *devpriv = dev->private;
        int i_DummyRead = 0;
 
-    /******************/
        /* Software reset */
-    /******************/
        i_DummyRead = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        i_DummyRead = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(1, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 
- /*****************************************************/
        /* Selects the master configuration control register */
- /*****************************************************/
        outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(0xF4, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 
-       /*****************************************************/
        /* Selects the mode specification register of port A */
-       /*****************************************************/
        outb(APCI1500_RW_PORT_A_SPECIFICATION,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(0x10, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deletes the register */
        outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 
-        /*****************************************************/
        /* Selects the mode specification register of port B */
-        /*****************************************************/
        outb(APCI1500_RW_PORT_B_SPECIFICATION,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(0x10, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deletes the register */
        outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 
-          /*****************************************************/
        /* Selects the data path polarity register of port C */
-          /*****************************************************/
        outb(APCI1500_RW_PORT_C_DATA_PCITCH_POLARITY,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* High level of port C means 1 */
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deletes it */
        outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-          /******************************************************/
        /* Selects the command and status register of timer 1 */
-          /******************************************************/
        outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deletes IP and IUS */
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deactivates the interrupt management of timer 1         */
        outb(0xE0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-          /******************************************************/
        /* Selects the command and status register of timer 2 */
-          /******************************************************/
        outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deletes IP and IUS */
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deactivates Timer 2 interrupt management:               */
        outb(0xE0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-         /******************************************************/
        /* Selects the command and status register of timer 3 */
-         /******************************************************/
        outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deletes IP and IUS */
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deactivates interrupt management of timer 3:            */
        outb(0xE0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-        /*************************************************/
        /* Selects the master interrupt control register */
-        /*************************************************/
        outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deletes all interrupts */
                }               /*  switch(data[4]) */
 
                i_TimerCounterMode = data[2] | data[4] | 7;
-                        /*************************/
                /* Test the reload value */
-                        /*************************/
 
                if ((data[3] >= 0) && (data[3] <= 65535)) {
                        if (data[7] == APCI1500_ENABLE
                                || data[7] == APCI1500_DISABLE) {
 
-                               /************************************************/
                                /* Selects the mode register of timer/counter 1 */
-                               /************************************************/
                                outb(APCI1500_RW_CPT_TMR1_MODE_SPECIFICATION,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
-                               /***********************/
                                /* Writes the new mode */
-                               /***********************/
                                outb(i_TimerCounterMode,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                               /****************************************************/
                                /* Selects the constant register of timer/counter 1 */
-                               /****************************************************/
 
                                outb(APCI1500_RW_CPT_TMR1_TIME_CST_LOW,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                 /*************************/
                                /* Writes the low value  */
-                                 /*************************/
 
                                outb(data[3],
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                  /****************************************************/
                                /* Selects the constant register of timer/counter 1 */
-                                  /****************************************************/
 
                                outb(APCI1500_RW_CPT_TMR1_TIME_CST_HIGH,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                 /**************************/
                                /* Writes the high value  */
-                                 /**************************/
 
                                data[3] = data[3] >> 8;
                                outb(data[3],
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                    /*********************************************/
                                /* Selects the master configuration register */
-                                    /*********************************************/
 
                                outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                    /**********************/
                                /* Reads the register */
-                                    /**********************/
 
                                i_MasterConfiguration =
                                        inb(devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                      /********************************************************/
                                /* Enables timer/counter 1 and triggers timer/counter 1 */
-                                      /********************************************************/
 
                                i_MasterConfiguration =
                                        i_MasterConfiguration | 0x40;
 
-                                   /*********************************************/
                                /* Selects the master configuration register */
-                                   /*********************************************/
                                outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                     /********************************/
                                /* Writes the new configuration */
-                                     /********************************/
                                outb(i_MasterConfiguration,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
-                                        /****************************************/
                                /* Selects the commands register of     */
                                /* timer/counter 1                      */
-                                        /****************************************/
 
                                outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                      /***************************/
                                /* Disable timer/counter 1 */
-                                      /***************************/
 
                                outb(0x0,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
-                                         /****************************************/
                                /* Selects the commands register of     */
                                /* timer/counter 1                      */
-                                         /****************************************/
                                outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                     /***************************/
                                /* Trigger timer/counter 1 */
-                                     /***************************/
                                outb(0x2,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
                i_TimerCounterMode = data[2] | data[4] | data[5] | data[6] | 7;
 
-                            /*************************/
                /* Test the reload value */
-                            /*************************/
 
                if ((data[3] >= 0) && (data[3] <= 65535)) {
                        if (data[7] == APCI1500_ENABLE
                                || data[7] == APCI1500_DISABLE) {
 
-                               /************************************************/
                                /* Selects the mode register of timer/counter 2 */
-                               /************************************************/
                                outb(APCI1500_RW_CPT_TMR2_MODE_SPECIFICATION,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
-                               /***********************/
                                /* Writes the new mode */
-                               /***********************/
                                outb(i_TimerCounterMode,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                               /****************************************************/
                                /* Selects the constant register of timer/counter 2 */
-                               /****************************************************/
 
                                outb(APCI1500_RW_CPT_TMR2_TIME_CST_LOW,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                 /*************************/
                                /* Writes the low value  */
-                                 /*************************/
 
                                outb(data[3],
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                  /****************************************************/
                                /* Selects the constant register of timer/counter 2 */
-                                  /****************************************************/
 
                                outb(APCI1500_RW_CPT_TMR2_TIME_CST_HIGH,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                 /**************************/
                                /* Writes the high value  */
-                                 /**************************/
 
                                data[3] = data[3] >> 8;
                                outb(data[3],
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                    /*********************************************/
                                /* Selects the master configuration register */
-                                    /*********************************************/
 
                                outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                    /**********************/
                                /* Reads the register */
-                                    /**********************/
 
                                i_MasterConfiguration =
                                        inb(devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                      /********************************************************/
                                /* Enables timer/counter 2 and triggers timer/counter 2 */
-                                      /********************************************************/
 
                                i_MasterConfiguration =
                                        i_MasterConfiguration | 0x20;
 
-                                   /*********************************************/
                                /* Selects the master configuration register */
-                                   /*********************************************/
                                outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                     /********************************/
                                /* Writes the new configuration */
-                                     /********************************/
                                outb(i_MasterConfiguration,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
-                                        /****************************************/
                                /* Selects the commands register of     */
                                /* timer/counter 2                      */
-                                        /****************************************/
 
                                outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                      /***************************/
                                /* Disable timer/counter 2 */
-                                      /***************************/
 
                                outb(0x0,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
-                                         /****************************************/
                                /* Selects the commands register of     */
                                /* timer/counter 2                      */
-                                         /****************************************/
                                outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                     /***************************/
                                /* Trigger timer/counter 1 */
-                                     /***************************/
                                outb(0x2,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
                        return -EINVAL;
                }               /*  switch(data[6]) */
 
-                     /*****************************/
                /* Test if used for watchdog */
-                         /*****************************/
 
                if (data[2] == APCI1500_WATCHDOG) {
-                            /*****************************/
                        /* - Enables the output line */
                        /* - Enables retrigger       */
                        /* - Pulses output           */
-                            /*****************************/
                        i_TimerCounterMode = data[2] | data[4] | 0x54;
                }               /* if (data[2] == APCI1500_WATCHDOG) */
                else {
                        i_TimerCounterMode = data[2] | data[4] | data[6] | 7;
                }               /* elseif (data[2] == APCI1500_WATCHDOG) */
-                                /*************************/
                /* Test the reload value */
-                            /*************************/
 
                if ((data[3] >= 0) && (data[3] <= 65535)) {
                        if (data[7] == APCI1500_ENABLE
                                || data[7] == APCI1500_DISABLE) {
 
-                               /************************************************/
                                /* Selects the mode register of watchdog/counter 3 */
-                               /************************************************/
                                outb(APCI1500_RW_CPT_TMR3_MODE_SPECIFICATION,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
-                               /***********************/
                                /* Writes the new mode */
-                               /***********************/
                                outb(i_TimerCounterMode,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                               /****************************************************/
                                /* Selects the constant register of watchdog/counter 3 */
-                               /****************************************************/
 
                                outb(APCI1500_RW_CPT_TMR3_TIME_CST_LOW,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                 /*************************/
                                /* Writes the low value  */
-                                 /*************************/
 
                                outb(data[3],
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                  /****************************************************/
                                /* Selects the constant register of watchdog/counter 3 */
-                                  /****************************************************/
 
                                outb(APCI1500_RW_CPT_TMR3_TIME_CST_HIGH,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                 /**************************/
                                /* Writes the high value  */
-                                 /**************************/
 
                                data[3] = data[3] >> 8;
                                outb(data[3],
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                    /*********************************************/
                                /* Selects the master configuration register */
-                                    /*********************************************/
 
                                outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                    /**********************/
                                /* Reads the register */
-                                    /**********************/
 
                                i_MasterConfiguration =
                                        inb(devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                      /********************************************************/
                                /* Enables watchdog/counter 3 and triggers watchdog/counter 3 */
-                                      /********************************************************/
 
                                i_MasterConfiguration =
                                        i_MasterConfiguration | 0x10;
 
-                                   /*********************************************/
                                /* Selects the master configuration register */
-                                   /*********************************************/
                                outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                     /********************************/
                                /* Writes the new configuration */
-                                     /********************************/
                                outb(i_MasterConfiguration,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-                                     /********************/
                                /* Test if COUNTER */
-                                         /********************/
                                if (data[2] == APCI1500_COUNTER) {
 
-                                           /*************************************/
                                        /* Selects the command register of   */
                                        /* watchdog/counter 3                */
-                                                /*************************************/
                                        outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
-                                             /*************************************************/
                                        /* Disable the  watchdog/counter 3 and starts it */
-                                                 /*************************************************/
                                        outb(0x0,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
 
-                                             /*************************************/
                                        /* Selects the command register of   */
                                        /* watchdog/counter 3                */
-                                                 /*************************************/
 
                                        outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
-                                            /*************************************************/
                                        /* Trigger the  watchdog/counter 3 and starts it */
-                                                /*************************************************/
                                        outb(0x2,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
                                else {
                                        i_CommandAndStatusValue = 0xE4; /* disable the interrupt */
                                }       /* elseif(i_TimerCounterWatchdogInterrupt==1) */
-                                             /**************************/
                                /* Starts timer/counter 1 */
-                                             /**************************/
                                i_TimerCounter1Enabled = 1;
-                                               /********************************************/
                                /* Selects the commands and status register */
-                                               /********************************************/
                                outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
                case STOP:
 
-                                             /**************************/
                        /* Stop timer/counter 1 */
-                                             /**************************/
 
-                                               /********************************************/
                        /* Selects the commands and status register */
-                                               /********************************************/
                        outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                case TRIGGER:
                        if (i_TimerCounter1Init == 1) {
                                if (i_TimerCounter1Enabled == 1) {
-                                                /************************/
                                        /* Set Trigger and gate */
-                                                /************************/
 
                                        i_CommandAndStatusValue = 0x6;
                                }       /* if( i_TimerCounter1Enabled==1) */
                                else {
-                                                  /***************/
                                        /* Set Trigger */
-                                                  /***************/
 
                                        i_CommandAndStatusValue = 0x2;
                                }       /* elseif(i_TimerCounter1Enabled==1) */
 
-                                               /********************************************/
                                /* Selects the commands and status register */
-                                               /********************************************/
                                outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
                                else {
                                        i_CommandAndStatusValue = 0xE4; /* disable the interrupt */
                                }       /* elseif(i_TimerCounterWatchdogInterrupt==1) */
-                                             /**************************/
                                /* Starts timer/counter 2 */
-                                             /**************************/
                                i_TimerCounter2Enabled = 1;
-                                               /********************************************/
                                /* Selects the commands and status register */
-                                               /********************************************/
                                outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
                case STOP:
 
-                                             /**************************/
                        /* Stop timer/counter 2 */
-                                             /**************************/
 
-                                               /********************************************/
                        /* Selects the commands and status register */
-                                               /********************************************/
                        outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                case TRIGGER:
                        if (i_TimerCounter2Init == 1) {
                                if (i_TimerCounter2Enabled == 1) {
-                                                /************************/
                                        /* Set Trigger and gate */
-                                                /************************/
 
                                        i_CommandAndStatusValue = 0x6;
                                }       /* if( i_TimerCounter2Enabled==1) */
                                else {
-                                                  /***************/
                                        /* Set Trigger */
-                                                  /***************/
 
                                        i_CommandAndStatusValue = 0x2;
                                }       /* elseif(i_TimerCounter2Enabled==1) */
 
-                                               /********************************************/
                                /* Selects the commands and status register */
-                                               /********************************************/
                                outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
                                else {
                                        i_CommandAndStatusValue = 0xE4; /* disable the interrupt */
                                }       /* elseif(i_TimerCounterWatchdogInterrupt==1) */
-                                             /**************************/
                                /* Starts Watchdog/counter 3 */
-                                             /**************************/
                                i_WatchdogCounter3Enabled = 1;
-                                               /********************************************/
                                /* Selects the commands and status register */
-                                               /********************************************/
                                outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
                case STOP:
 
-                                             /**************************/
                        /* Stop Watchdog/counter 3 */
-                                             /**************************/
 
-                                               /********************************************/
                        /* Selects the commands and status register */
-                                               /********************************************/
                        outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                        case 0: /* triggering counter 3 */
                                if (i_WatchdogCounter3Init == 1) {
                                        if (i_WatchdogCounter3Enabled == 1) {
-                                                              /************************/
                                                /* Set Trigger and gate */
-                                                              /************************/
 
                                                i_CommandAndStatusValue = 0x6;
                                        }       /* if( i_WatchdogCounter3Enabled==1) */
                                        else {
-                                                          /***************/
                                                /* Set Trigger */
-                                                          /***************/
 
                                                i_CommandAndStatusValue = 0x2;
                                        }       /* elseif(i_WatchdogCounter3Enabled==1) */
 
-                                               /********************************************/
                                        /* Selects the commands and status register */
-                                               /********************************************/
                                        outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
                                /* triggering Watchdog 3 */
                                if (i_WatchdogCounter3Init == 1) {
 
-                                               /********************************************/
                                        /* Selects the commands and status register */
-                                               /********************************************/
                                        outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
                                                devpriv->iobase +
                                                APCI1500_Z8536_CONTROL_REGISTER);
                /* Read counter/timer1 */
                if (i_TimerCounter1Init == 1) {
                        if (i_TimerCounter1Enabled == 1) {
-                 /************************/
                                /* Set RCC and gate */
-                 /************************/
 
                                i_CommandAndStatusValue = 0xC;
                        }       /* if( i_TimerCounter1Init==1) */
                        else {
-                   /***************/
                                /* Set RCC */
-                   /***************/
 
                                i_CommandAndStatusValue = 0x8;
                        }       /* elseif(i_TimerCounter1Init==1) */
 
-               /********************************************/
                        /* Selects the commands and status register */
-               /********************************************/
                        outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
 
-                /***************************************/
                        /* Selects the counter register (high) */
-                /***************************************/
                        outb(APCI1500_R_CPT_TMR1_VALUE_HIGH,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                /* Read counter/timer2 */
                if (i_TimerCounter2Init == 1) {
                        if (i_TimerCounter2Enabled == 1) {
-                 /************************/
                                /* Set RCC and gate */
-                 /************************/
 
                                i_CommandAndStatusValue = 0xC;
                        }       /* if( i_TimerCounter2Init==1) */
                        else {
-                   /***************/
                                /* Set RCC */
-                   /***************/
 
                                i_CommandAndStatusValue = 0x8;
                        }       /* elseif(i_TimerCounter2Init==1) */
 
-               /********************************************/
                        /* Selects the commands and status register */
-               /********************************************/
                        outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
 
-                /***************************************/
                        /* Selects the counter register (high) */
-                /***************************************/
                        outb(APCI1500_R_CPT_TMR2_VALUE_HIGH,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                /* Read counter/watchdog2 */
                if (i_WatchdogCounter3Init == 1) {
                        if (i_WatchdogCounter3Enabled == 1) {
-                 /************************/
                                /* Set RCC and gate */
-                 /************************/
 
                                i_CommandAndStatusValue = 0xC;
                        }       /* if( i_TimerCounter2Init==1) */
                        else {
-                   /***************/
                                /* Set RCC */
-                   /***************/
 
                                i_CommandAndStatusValue = 0x8;
                        }       /* elseif(i_WatchdogCounter3Init==1) */
 
-               /********************************************/
                        /* Selects the commands and status register */
-               /********************************************/
                        outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
 
-                /***************************************/
                        /* Selects the counter register (high) */
-                /***************************************/
                        outb(APCI1500_R_CPT_TMR3_VALUE_HIGH,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                }               /* else if(data[0]==0) */
        }                       /* elseif(data[0]==1) */
 
-        /*****************************************************/
        /* Selects the mode specification register of port B */
-        /*****************************************************/
        outb(APCI1500_RW_PORT_B_SPECIFICATION,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        i_RegValue = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(APCI1500_RW_PORT_B_SPECIFICATION,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-      /*********************************************/
        /* Writes the new configuration (APCI1500_OR) */
-      /*********************************************/
        i_RegValue = (i_RegValue & 0xF9) | APCI1500_OR;
 
        outb(i_RegValue, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-       /*****************************************************/
        /* Selects the command and status register of port B */
-       /*****************************************************/
        outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-       /*****************************************/
        /* Authorises the interrupt on the board */
-       /*****************************************/
        outb(0xC0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-       /***************************************************/
        /* Selects the pattern polarity register of port B */
-       /***************************************************/
        outb(APCI1500_RW_PORT_B_PATTERN_POLARITY,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(i_Constant, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-       /*****************************************************/
        /* Selects the pattern transition register of port B */
-       /*****************************************************/
        outb(APCI1500_RW_PORT_B_PATTERN_TRANSITION,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(i_Constant, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-       /***********************************************/
        /* Selects the pattern mask register of port B */
-       /***********************************************/
        outb(APCI1500_RW_PORT_B_PATTERN_MASK,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(i_Constant, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 
-       /*****************************************************/
        /* Selects the command and status register of port A */
-       /*****************************************************/
        outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        i_RegValue = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-        /***********************************/
        /* Deletes the interrupt of port A */
-        /***********************************/
 
        i_RegValue = (i_RegValue & 0x0F) | 0x20;
        outb(i_RegValue, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-       /*****************************************************/
        /* Selects the command and status register of port  B */
-       /*****************************************************/
        outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        i_RegValue = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-        /***********************************/
        /* Deletes the interrupt of port B */
-        /***********************************/
 
        i_RegValue = (i_RegValue & 0x0F) | 0x20;
        outb(i_RegValue, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 
-       /*****************************************************/
        /* Selects the command and status register of timer 1 */
-       /*****************************************************/
        outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        i_RegValue = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-        /***********************************/
        /* Deletes the interrupt of timer 1 */
-        /***********************************/
 
        i_RegValue = (i_RegValue & 0x0F) | 0x20;
        outb(i_RegValue, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 
-        /*****************************************************/
        /* Selects the command and status register of timer 2 */
-       /*****************************************************/
        outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        i_RegValue = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-        /***********************************/
        /* Deletes the interrupt of timer 2 */
-        /***********************************/
 
        i_RegValue = (i_RegValue & 0x0F) | 0x20;
        outb(i_RegValue, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 
-       /*****************************************************/
        /* Selects the command and status register of timer 3 */
-       /*****************************************************/
        outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        i_RegValue = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-        /***********************************/
        /* Deletes the interrupt of timer 3 */
-        /***********************************/
 
        i_RegValue = (i_RegValue & 0x0F) | 0x20;
        outb(i_RegValue, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 
-        /*************************************************/
        /* Selects the master interrupt control register */
-        /*************************************************/
        outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-       /**********************************************/
        /* Authorizes the main interrupt on the board */
-       /**********************************************/
        outb(0xD0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 
-      /***************************/
        /* Enables the PCI interrupt */
-      /*****************************/
        outl(0x3000, devpriv->i_IobaseAmcc + 0x38);
        ui_Status = inl(devpriv->i_IobaseAmcc + 0x10);
        ui_Status = inl(devpriv->i_IobaseAmcc + 0x38);
        int i_RegValue = 0;
        i_InterruptMask = 0;
 
- /***********************************/
        /* Read the board interrupt status */
- /***********************************/
        ui_InterruptStatus = inl(devpriv->i_IobaseAmcc + 0x38);
 
-  /***************************************/
        /* Test if board generated a interrupt */
-  /***************************************/
        if ((ui_InterruptStatus & 0x800000) == 0x800000) {
-      /************************/
                /* Disable all Interrupt */
-      /************************/
-      /*************************************************/
                /* Selects the master interrupt control register */
-      /*************************************************/
                /* outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER); */
-       /**********************************************/
                /* Disables  the main interrupt on the board */
-       /**********************************************/
                /* outb(0x00,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER); */
 
-   /*****************************************************/
                /* Selects the command and status register of port A */
-   /*****************************************************/
                outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS,
                        devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
                i_RegValue =
                        inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
                if ((i_RegValue & 0x60) == 0x60) {
-          /*****************************************************/
                        /* Selects the command and status register of port A */
-          /*****************************************************/
                        outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
-           /***********************************/
                        /* Deletes the interrupt of port A */
-           /***********************************/
                        i_RegValue = (i_RegValue & 0x0F) | 0x20;
                        outb(i_RegValue,
                                devpriv->iobase +
                                        inb(devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
 
-             /***************************************************/
                                /* Selects the interrupt vector register of port A */
-             /***************************************************/
                                outb(APCI1500_RW_PORT_A_INTERRUPT_CONTROL,
                                        devpriv->iobase +
                                        APCI1500_Z8536_CONTROL_REGISTER);
                        }       /* elseif(i_Logic==APCI1500_OR_PRIORITY) */
                }               /*  if ((i_RegValue & 0x60) == 0x60) */
 
-          /*****************************************************/
                /* Selects the command and status register of port B */
-          /*****************************************************/
                outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
                        devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
                i_RegValue =
                        inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
                if ((i_RegValue & 0x60) == 0x60) {
-            /*****************************************************/
                        /* Selects the command and status register of port B */
-            /*****************************************************/
                        outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
-            /***********************************/
                        /* Deletes the interrupt of port B */
-            /***********************************/
                        i_RegValue = (i_RegValue & 0x0F) | 0x20;
                        outb(i_RegValue,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
-            /****************/
                        /* Reads port B */
-            /****************/
                        i_RegValue =
                                inb((unsigned int) devpriv->iobase +
                                APCI1500_Z8536_PORT_B);
 
                        i_RegValue = i_RegValue & 0xC0;
-             /**************************************/
                        /* Tests if this is an external error */
-             /**************************************/
 
                        if (i_RegValue) {
                                /* Disable the interrupt */
-                    /*****************************************************/
                                /* Selects the command and status register of port B */
-                    /*****************************************************/
                                outl(0x0, devpriv->i_IobaseAmcc + 0x38);
 
                                if (i_RegValue & 0x80) {
                        }       /*  if (i_RegValue) */
                }               /* if ((i_RegValue & 0x60) == 0x60) */
 
-               /*****************************************************/
                /* Selects the command and status register of timer 1 */
-               /*****************************************************/
                outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
                        devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
                i_RegValue =
                        inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
                if ((i_RegValue & 0x60) == 0x60) {
-                  /*****************************************************/
                        /* Selects the command and status register of timer 1 */
-                  /*****************************************************/
                        outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
-                  /***********************************/
                        /* Deletes the interrupt of timer 1 */
-                  /***********************************/
                        i_RegValue = (i_RegValue & 0x0F) | 0x20;
                        outb(i_RegValue,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
                        i_InterruptMask = i_InterruptMask | 4;
                }               /*  if ((i_RegValue & 0x60) == 0x60) */
-               /*****************************************************/
                /* Selects the command and status register of timer 2 */
-               /*****************************************************/
                outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
                        devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
                i_RegValue =
                        inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
                if ((i_RegValue & 0x60) == 0x60) {
-                  /*****************************************************/
                        /* Selects the command and status register of timer 2 */
-                  /*****************************************************/
                        outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
-                  /***********************************/
                        /* Deletes the interrupt of timer 2 */
-                  /***********************************/
                        i_RegValue = (i_RegValue & 0x0F) | 0x20;
                        outb(i_RegValue,
                                devpriv->iobase +
                        i_InterruptMask = i_InterruptMask | 8;
                }               /*  if ((i_RegValue & 0x60) == 0x60) */
 
-               /*****************************************************/
                /* Selects the command and status register of timer 3 */
-               /*****************************************************/
                outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
                        devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
                i_RegValue =
                        inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
                if ((i_RegValue & 0x60) == 0x60) {
-                  /*****************************************************/
                        /* Selects the command and status register of timer 3 */
-                  /*****************************************************/
                        outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
                                devpriv->iobase +
                                APCI1500_Z8536_CONTROL_REGISTER);
-                  /***********************************/
                        /* Deletes the interrupt of timer 3 */
-                  /***********************************/
                        i_RegValue = (i_RegValue & 0x0F) | 0x20;
                        outb(i_RegValue,
                                devpriv->iobase +
                }               /*  if ((i_RegValue & 0x60) == 0x60) */
 
                send_sig(SIGIO, devpriv->tsk_Current, 0);       /*  send signal to the sample */
-              /***********************/
                /* Enable all Interrupts */
-              /***********************/
 
-              /*************************************************/
                /* Selects the master interrupt control register */
-              /*************************************************/
                outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL,
                        devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-              /**********************************************/
                /* Authorizes the main interrupt on the board */
-              /**********************************************/
                outb(0xD0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        }                       /*   if ((ui_InterruptStatus & 0x800000) == 0x800000) */
        else {
        i_TimerCounter2Enabled = 0;
        i_WatchdogCounter3Enabled = 0;
 
-    /******************/
        /* Software reset */
-    /******************/
        i_DummyRead = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        i_DummyRead = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(1, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 
- /*****************************************************/
        /* Selects the master configuration control register */
- /*****************************************************/
        outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(0xF4, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 
-       /*****************************************************/
        /* Selects the mode specification register of port A */
-       /*****************************************************/
        outb(APCI1500_RW_PORT_A_SPECIFICATION,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(0x10, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deletes the register */
        outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 
-        /*****************************************************/
        /* Selects the mode specification register of port B */
-        /*****************************************************/
        outb(APCI1500_RW_PORT_B_SPECIFICATION,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        outb(0x10, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deletes the register */
        outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 
-          /*****************************************************/
        /* Selects the data path polarity register of port C */
-          /*****************************************************/
        outb(APCI1500_RW_PORT_C_DATA_PCITCH_POLARITY,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* High level of port C means 1 */
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deletes it */
        outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-          /******************************************************/
        /* Selects the command and status register of timer 1 */
-          /******************************************************/
        outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deletes IP and IUS */
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deactivates the interrupt management of timer 1         */
        outb(0xE0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-          /******************************************************/
        /* Selects the command and status register of timer 2 */
-          /******************************************************/
        outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deletes IP and IUS */
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deactivates Timer 2 interrupt management:               */
        outb(0xE0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-         /******************************************************/
        /* Selects the command and status register of timer 3 */
-         /******************************************************/
        outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deletes IP and IUS */
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deactivates interrupt management of timer 3:            */
        outb(0xE0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-        /*************************************************/
        /* Selects the master interrupt control register */
-        /*************************************************/
        outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* Deletes all interrupts */
        outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        /* reset all the digital outputs */
        outw(0x0, devpriv->i_IobaseAddon + APCI1500_DIGITAL_OP);
-/*******************************/
 /* Disable the board interrupt */
-/*******************************/
- /*************************************************/
        /* Selects the master interrupt control register */
- /*************************************************/
        outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-/****************************/
 /* Deactivates all interrupts */
-/******************************/
        outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
- /*****************************************************/
        /* Selects the command and status register of port A */
- /*****************************************************/
        outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-/****************************/
 /* Deactivates all interrupts */
-/******************************/
        outb(0x00, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-/*****************************************************/
        /* Selects the command and status register of port B */
- /*****************************************************/
        outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-/****************************/
 /* Deactivates all interrupts */
-/******************************/
        outb(0x00, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-/*****************************************************/
        /* Selects the command and status register of timer 1 */
- /*****************************************************/
        outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-/****************************/
 /* Deactivates all interrupts */
-/******************************/
        outb(0x00, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-/*****************************************************/
        /* Selects the command and status register of timer 2 */
- /*****************************************************/
        outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-/****************************/
 /* Deactivates all interrupts */
-/******************************/
        outb(0x00, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-/*****************************************************/
 /* Selects the command and status register of timer 3*/
-/*****************************************************/
        outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
                devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
-/****************************/
 /* Deactivates all interrupts */
-/******************************/
        outb(0x00, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
        return 0;
 }