target/arm/ptw: Don't set fi->s1ptw for UnsuppAtomicUpdate fault
authorPeter Maydell <peter.maydell@linaro.org>
Tue, 22 Aug 2023 16:31:05 +0000 (17:31 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 22 Aug 2023 16:31:05 +0000 (17:31 +0100)
For an Unsupported Atomic Update fault where the stage 1 translation
table descriptor update can't be done because it's to an unsupported
memory type, this is a stage 1 abort (per the Arm ARM R_VSXXT).  This
means we should not set fi->s1ptw, because this will cause the code
in the get_phys_addr_lpae() error-exit path to mark it as stage 2.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230807141514.19075-2-peter.maydell@linaro.org

target/arm/ptw.c

index 8f94100c61f7237898401a5c6def553b40659710..bafeb876ad78bc9da35c3c96a87290c4e83c913e 100644 (file)
@@ -701,7 +701,6 @@ static uint64_t arm_casq_ptw(CPUARMState *env, uint64_t old_val,
 
     if (unlikely(!host)) {
         fi->type = ARMFault_UnsuppAtomicUpdate;
-        fi->s1ptw = true;
         return 0;
     }