crypto: caam/qi2 - add support for ChaCha20

Add support for ChaCha20 skcipher algorithm.

Signed-off-by: Carmen Iorga <carmen.iorga@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/caam/caamalg_desc.c b/drivers/crypto/caam/caamalg_desc.c
index 1a6f0da141069fe0be11906eec774e53bf0fed69..d850590079a2353e02091873ff78b3ee0aca9fba 100644 (file)
--- a/drivers/crypto/caam/caamalg_desc.c
+++ b/drivers/crypto/caam/caamalg_desc.c
@@ -1228,7 +1228,8 @@ static inline void skcipher_append_src_dst(u32 *desc)
  * @desc: pointer to buffer used for descriptor construction
  * @cdata: pointer to block cipher transform definitions
  *         Valid algorithm values - one of OP_ALG_ALGSEL_{AES, DES, 3DES} ANDed
- *         with OP_ALG_AAI_CBC or OP_ALG_AAI_CTR_MOD128.
+ *         with OP_ALG_AAI_CBC or OP_ALG_AAI_CTR_MOD128
+ *                                - OP_ALG_ALGSEL_CHACHA20
  * @ivsize: initialization vector size
  * @is_rfc3686: true when ctr(aes) is wrapped by rfc3686 template
  * @ctx1_iv_off: IV offset in CONTEXT1 register
@@ -1293,7 +1294,8 @@ EXPORT_SYMBOL(cnstr_shdsc_skcipher_encap);
  * @desc: pointer to buffer used for descriptor construction
  * @cdata: pointer to block cipher transform definitions
  *         Valid algorithm values - one of OP_ALG_ALGSEL_{AES, DES, 3DES} ANDed
- *         with OP_ALG_AAI_CBC or OP_ALG_AAI_CTR_MOD128.
+ *         with OP_ALG_AAI_CBC or OP_ALG_AAI_CTR_MOD128
+ *                                - OP_ALG_ALGSEL_CHACHA20
  * @ivsize: initialization vector size
  * @is_rfc3686: true when ctr(aes) is wrapped by rfc3686 template
  * @ctx1_iv_off: IV offset in CONTEXT1 register

diff --git a/drivers/crypto/caam/caamalg_qi2.c b/drivers/crypto/caam/caamalg_qi2.c
index 7d8ac0222fa3b2e4a9ecab3d96b19f0f17a87033..a9e264bb9629088a7448e4cf619d6e5699a1fade 100644 (file)
--- a/drivers/crypto/caam/caamalg_qi2.c
+++ b/drivers/crypto/caam/caamalg_qi2.c
@@ -816,7 +816,9 @@ static int skcipher_setkey(struct crypto_skcipher *skcipher, const u8 *key,
        u32 *desc;
        u32 ctx1_iv_off = 0;
        const bool ctr_mode = ((ctx->cdata.algtype & OP_ALG_AAI_MASK) ==
-                              OP_ALG_AAI_CTR_MOD128);
+                              OP_ALG_AAI_CTR_MOD128) &&
+                              ((ctx->cdata.algtype & OP_ALG_ALGSEL_MASK) !=
+                              OP_ALG_ALGSEL_CHACHA20);
        const bool is_rfc3686 = alg->caam.rfc3686;
 
        print_hex_dump_debug("key in @" __stringify(__LINE__)": ",
@@ -1494,7 +1496,23 @@ static struct caam_skcipher_alg driver_algs[] = {
                        .ivsize = AES_BLOCK_SIZE,
                },
                .caam.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_XTS,
-       }
+       },
+       {
+               .skcipher = {
+                       .base = {
+                               .cra_name = "chacha20",
+                               .cra_driver_name = "chacha20-caam-qi2",
+                               .cra_blocksize = 1,
+                       },
+                       .setkey = skcipher_setkey,
+                       .encrypt = skcipher_encrypt,
+                       .decrypt = skcipher_decrypt,
+                       .min_keysize = CHACHA20_KEY_SIZE,
+                       .max_keysize = CHACHA20_KEY_SIZE,
+                       .ivsize = CHACHA20_IV_SIZE,
+               },
+               .caam.class1_alg_type = OP_ALG_ALGSEL_CHACHA20,
+       },
 };
 
 static struct caam_aead_alg driver_aeads[] = {
@@ -4908,6 +4926,11 @@ static int dpaa2_caam_probe(struct fsl_mc_device *dpseci_dev)
                    alg_sel == OP_ALG_ALGSEL_AES)
                        continue;
 
+               /* Skip CHACHA20 algorithms if not supported by device */
+               if (alg_sel == OP_ALG_ALGSEL_CHACHA20 &&
+                   !priv->sec_attr.ccha_acc_num)
+                       continue;
+
                t_alg->caam.dev = dev;
                caam_skcipher_alg_init(t_alg);
 

diff --git a/drivers/crypto/caam/compat.h b/drivers/crypto/caam/compat.h
index 9604ff7a335e1fa8e9c8a0dedebe701d8ade7d2c..a5081b4050b63dfdd0569d2ac7989f52b2c708c2 100644 (file)
--- a/drivers/crypto/caam/compat.h
+++ b/drivers/crypto/caam/compat.h
@@ -36,6 +36,7 @@
 #include <crypto/gcm.h>
 #include <crypto/sha.h>
 #include <crypto/md5.h>
+#include <crypto/chacha20.h>
 #include <crypto/internal/aead.h>
 #include <crypto/authenc.h>
 #include <crypto/akcipher.h>

diff --git a/drivers/crypto/caam/desc.h b/drivers/crypto/caam/desc.h
index ec1ef06049b4c3e6757078f732497bf7b913060b..9d117e51629f9709026d408c1681dc06f8460fe0 100644 (file)
--- a/drivers/crypto/caam/desc.h
+++ b/drivers/crypto/caam/desc.h
@@ -1159,6 +1159,7 @@
 #define OP_ALG_ALGSEL_KASUMI   (0x70 << OP_ALG_ALGSEL_SHIFT)
 #define OP_ALG_ALGSEL_CRC      (0x90 << OP_ALG_ALGSEL_SHIFT)
 #define OP_ALG_ALGSEL_SNOW_F9  (0xA0 << OP_ALG_ALGSEL_SHIFT)
+#define OP_ALG_ALGSEL_CHACHA20 (0xD0 << OP_ALG_ALGSEL_SHIFT)
 
 #define OP_ALG_AAI_SHIFT       4
 #define OP_ALG_AAI_MASK                (0x1ff << OP_ALG_AAI_SHIFT)
@@ -1206,6 +1207,11 @@
 #define OP_ALG_AAI_RNG4_AI     (0x80 << OP_ALG_AAI_SHIFT)
 #define OP_ALG_AAI_RNG4_SK     (0x100 << OP_ALG_AAI_SHIFT)
 
+/* Chacha20 AAI set */
+#define OP_ALG_AAI_AEAD        (0x002 << OP_ALG_AAI_SHIFT)
+#define OP_ALG_AAI_KEYSTREAM   (0x001 << OP_ALG_AAI_SHIFT)
+#define OP_ALG_AAI_BC8         (0x008 << OP_ALG_AAI_SHIFT)
+
 /* hmac/smac AAI set */
 #define OP_ALG_AAI_HASH                (0x00 << OP_ALG_AAI_SHIFT)
 #define OP_ALG_AAI_HMAC                (0x01 << OP_ALG_AAI_SHIFT)