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powerpc/bpf ppc32: Fix ALU32 BPF_ARSH operation
author
Naveen N. Rao
<naveen.n.rao@linux.vnet.ibm.com>
Tue, 5 Oct 2021 20:25:26 +0000
(
01:55
+0530)
committer
Michael Ellerman
<mpe@ellerman.id.au>
Thu, 7 Oct 2021 08:52:58 +0000
(19:52 +1100)
Correct the destination register used for ALU32 BPF_ARSH operation.
Fixes: 51c66ad849a703 ("powerpc/bpf: Implement extended BPF on PPC32")
Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link:
https://lore.kernel.org/r/6d24c1f9e79b6f61f5135eaf2ea1e8bcd4dac87b.1633464148.git.naveen.n.rao@linux.vnet.ibm.com
arch/powerpc/net/bpf_jit_comp32.c
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diff --git
a/arch/powerpc/net/bpf_jit_comp32.c
b/arch/powerpc/net/bpf_jit_comp32.c
index a74d52204f8da20ed75fff81d907f5884d24038f..519ecb9ab67266753502a475055facfa733614eb 100644
(file)
--- a/
arch/powerpc/net/bpf_jit_comp32.c
+++ b/
arch/powerpc/net/bpf_jit_comp32.c
@@
-625,7
+625,7
@@
int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context *
EMIT(PPC_RAW_LI(dst_reg_h, 0));
break;
case BPF_ALU | BPF_ARSH | BPF_X: /* (s32) dst >>= src */
- EMIT(PPC_RAW_SRAW(dst_reg
_h
, dst_reg, src_reg));
+ EMIT(PPC_RAW_SRAW(dst_reg, dst_reg, src_reg));
break;
case BPF_ALU64 | BPF_ARSH | BPF_X: /* (s64) dst >>= src */
bpf_set_seen_register(ctx, tmp_reg);