usb: dwc2: Disable clock gating feature on Rockchip SoCs
authorWilliam Wu <william.wu@rock-chips.com>
Tue, 26 Dec 2023 07:19:59 +0000 (15:19 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 2 Jan 2024 13:35:23 +0000 (14:35 +0100)
The DWC2 IP on the Rockchip SoCs doesn't support clock gating.
When a clock gating is enabled, system hangs.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Acked-by: Minas Harutyunyan <hminas@synopsys.com>
Link: https://lore.kernel.org/r/1703575199-23638-1-git-send-email-william.wu@rock-chips.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/usb/dwc2/params.c

index fb03162ae9b764d97d7df31ec1e158b564898076..eb677c3cfd0b62677a1e51502d3a78f1d68cdef2 100644 (file)
@@ -130,6 +130,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)
        p->lpm_clock_gating = false;
        p->besl = false;
        p->hird_threshold_en = false;
+       p->no_clock_gating = true;
 }
 
 static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)