pll->bus_type = SMIAPP_PLL_BUS_TYPE_CSI2;
        pll->csi2.lanes = sensor->platform_data->lanes;
        pll->ext_clk_freq_hz = sensor->platform_data->ext_clk;
+       if (sensor->minfo.quirk)
+               pll->flags = sensor->minfo.quirk->pll_flags;
        /* Profile 0 sensors have no separate OP clock branch. */
        if (sensor->minfo.smiapp_profile == SMIAPP_PROFILE_0)
                pll->flags |= SMIAPP_PLL_FLAG_NO_OP_CLOCKS;
-       if (smiapp_needs_quirk(sensor,
-                              SMIAPP_QUIRK_FLAG_OP_PIX_CLOCK_PER_LANE))
-               pll->flags |= SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE;
        pll->scale_n = sensor->limits[SMIAPP_LIMIT_SCALER_N_MIN];
 
        rval = smiapp_update_mode(sensor);
 
        .post_poweron = jt8ev1_post_poweron,
        .pre_streamon = jt8ev1_pre_streamon,
        .post_streamoff = jt8ev1_post_streamoff,
-       .flags = SMIAPP_QUIRK_FLAG_OP_PIX_CLOCK_PER_LANE,
+       .pll_flags = SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE,
 };
 
 static int tcm8500md_limits(struct smiapp_sensor *sensor)
 
        int (*pre_streamon)(struct smiapp_sensor *sensor);
        int (*post_streamoff)(struct smiapp_sensor *sensor);
        unsigned long flags;
+       unsigned long pll_flags;
 };
 
-/* op pix clock is for all lanes in total normally */
-#define SMIAPP_QUIRK_FLAG_OP_PIX_CLOCK_PER_LANE                        (1 << 0)
-#define SMIAPP_QUIRK_FLAG_8BIT_READ_ONLY                       (1 << 1)
+#define SMIAPP_QUIRK_FLAG_8BIT_READ_ONLY                       (1 << 0)
 
 struct smiapp_reg_8 {
        u16 reg;