perf/x86/amd: Support PERF_SAMPLE_ADDR

IBS_DC_LINADDR provides the linear data address for the tagged load/
store operation. Populate perf sample address using it.

Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20220928095805.596-6-ravi.bangoria@amd.com

diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
index d883694e0fd4d78de8c84d6934153431e097c697..0ad49105c15404774ff1c601c01988237bb70a2b 100644 (file)
--- a/arch/x86/events/amd/ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -984,6 +984,11 @@ static void perf_ibs_parse_ld_st_data(__u64 sample_type,
                }
                data->sample_flags |= PERF_SAMPLE_WEIGHT_TYPE;
        }
+
+       if (sample_type & PERF_SAMPLE_ADDR && op_data3.dc_lin_addr_valid) {
+               data->addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCLINAD)];
+               data->sample_flags |= PERF_SAMPLE_ADDR;
+       }
 }
 
 static int perf_ibs_get_offset_max(struct perf_ibs *perf_ibs, u64 sample_type,
@@ -992,7 +997,8 @@ static int perf_ibs_get_offset_max(struct perf_ibs *perf_ibs, u64 sample_type,
        if (sample_type & PERF_SAMPLE_RAW ||
            (perf_ibs == &perf_ibs_op &&
             (sample_type & PERF_SAMPLE_DATA_SRC ||
-             sample_type & PERF_SAMPLE_WEIGHT_TYPE)))
+             sample_type & PERF_SAMPLE_WEIGHT_TYPE ||
+             sample_type & PERF_SAMPLE_ADDR)))
                return perf_ibs->offset_max;
        else if (check_rip)
                return 3;