arm64/mte: Add a little bit of documentation for mte_update_sctlr_user()

The code isn't that obscure but it probably won't hurt to have a little
bit more documentation for anyone trying to find out where everything
actually takes effect.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Vincenzo Frascino <Vincenzo.Frascino@arm.com>
Tested-by: Branislav Rankov <branislav.rankov@arm.com>
Link: https://lore.kernel.org/r/20220216173224.2342152-3-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c
index f983795b5eda29d34c03ced50281a3e2014da02d..b9a2d13e85f6d21ac5ca1a03a3c7d9860f87f38d 100644 (file)
--- a/arch/arm64/kernel/mte.c
+++ b/arch/arm64/kernel/mte.c
@@ -186,6 +186,11 @@ void mte_check_tfsr_el1(void)
 }
 #endif
 
+/*
+ * This is where we actually resolve the system and process MTE mode
+ * configuration into an actual value in SCTLR_EL1 that affects
+ * userspace.
+ */
 static void mte_update_sctlr_user(struct task_struct *task)
 {
        /*
@@ -199,8 +204,17 @@ static void mte_update_sctlr_user(struct task_struct *task)
        unsigned long pref, resolved_mte_tcf;
 
        pref = __this_cpu_read(mte_tcf_preferred);
+       /*
+        * If there is no overlap between the system preferred and
+        * program requested values go with what was requested.
+        */
        resolved_mte_tcf = (mte_ctrl & pref) ? pref : mte_ctrl;
        sctlr &= ~SCTLR_EL1_TCF0_MASK;
+       /*
+        * Pick an actual setting. The order in which we check for
+        * set bits and map into register values determines our
+        * default order.
+        */
        if (resolved_mte_tcf & MTE_CTRL_TCF_ASYNC)
                sctlr |= SCTLR_EL1_TCF0_ASYNC;
        else if (resolved_mte_tcf & MTE_CTRL_TCF_SYNC)