ARM: dts: arm: align UART node name with bindings
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Mon, 23 Jan 2023 15:15:33 +0000 (16:15 +0100)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Thu, 26 Jan 2023 10:19:57 +0000 (11:19 +0100)
Bindings expect UART/serial node names to be "serial".

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Link: https://lore.kernel.org/r/20230123151533.369533-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
arch/arm/boot/dts/integrator.dtsi
arch/arm/boot/dts/integratorap-im-pd1.dts
arch/arm/boot/dts/integratorap.dts
arch/arm/boot/dts/integratorcp.dts
arch/arm/boot/dts/versatile-ab.dts
arch/arm/boot/dts/versatile-pb.dts
arch/arm/boot/dts/vexpress-v2m.dtsi

index ad868cfebc94ab38eff200d83f8e1c720ca1c20a..7f1c8ee9dd8aba0843d0f499ab3546860ab98a66 100644 (file)
                        interrupts = <8>;
                };
 
-               uart@16000000 {
+               serial@16000000 {
                        reg = <0x16000000 0x1000>;
                        interrupts = <1>;
                };
 
-               uart@17000000 {
+               serial@17000000 {
                        reg = <0x17000000 0x1000>;
                        interrupts = <2>;
                };
index cc514cf07bff7dcab39cb2b33f87b43ad0c4d0b0..7072a70da00d950b1ec5362a532cc01a67b014f4 100644 (file)
                };
        };
 
-       uart@100000 {
+       serial@100000 {
                compatible = "arm,pl011", "arm,primecell";
                reg = <0x00100000 0x1000>;
                interrupts-extended = <&impd1_vic 1>;
                clock-names = "uartclk", "apb_pclk";
        };
 
-       uart@200000 {
+       serial@200000 {
                compatible = "arm,pl011", "arm,primecell";
                reg = <0x00200000 0x1000>;
                interrupts-extended = <&impd1_vic 2>;
index 9148287fa0a930de7c329d412cde880740256469..5b52d75bc6bed8d156588ec8b4ceb59967ef073e 100644 (file)
                        clock-names = "apb_pclk";
                };
 
-               uart0: uart@16000000 {
+               uart0: serial@16000000 {
                        compatible = "arm,pl010", "arm,primecell";
                        arm,primecell-periphid = <0x00041010>;
                        clocks = <&uartclk>, <&pclk>;
                        clock-names = "uartclk", "apb_pclk";
                };
 
-               uart1: uart@17000000 {
+               uart1: serial@17000000 {
                        compatible = "arm,pl010", "arm,primecell";
                        arm,primecell-periphid = <0x00041010>;
                        clocks = <&uartclk>, <&pclk>;
index 38fc7e81bdb652e6fa94e88ec44e707bd19fd2a6..c011333eb165d769a2c0eca61470b1427469f936 100644 (file)
                        clock-names = "apb_pclk";
                };
 
-               uart@16000000 {
+               serial@16000000 {
                        compatible = "arm,pl011", "arm,primecell";
                        clocks = <&uartclk>, <&pclk>;
                        clock-names = "uartclk", "apb_pclk";
                };
 
-               uart@17000000 {
+               serial@17000000 {
                        compatible = "arm,pl011", "arm,primecell";
                        clocks = <&uartclk>, <&pclk>;
                        clock-names = "uartclk", "apb_pclk";
index a520615f4d8dbc64bee0589b4d026cc164a1d588..f31dcf7e5862e9229716dbbcfe427b38a578a7e2 100644 (file)
                        clock-names = "apb_pclk";
                };
 
-               uart0: uart@101f1000 {
+               uart0: serial@101f1000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x101f1000 0x1000>;
                        interrupts = <12>;
                        clock-names = "uartclk", "apb_pclk";
                };
 
-               uart1: uart@101f2000 {
+               uart1: serial@101f2000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x101f2000 0x1000>;
                        interrupts = <13>;
                        clock-names = "uartclk", "apb_pclk";
                };
 
-               uart2: uart@101f3000 {
+               uart2: serial@101f3000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x101f3000 0x1000>;
                        interrupts = <14>;
index e7e751a858d811ac4fa4e6c82d1707c560087f44..fc21ce54b33a57f4a53f92bf84dec76651755794 100644 (file)
@@ -85,7 +85,7 @@
                                 */
                                interrupts-extended = <&sic 22 &sic 23>;
                        };
-                       uart@9000 {
+                       serial@9000 {
                                compatible = "arm,pl011", "arm,primecell";
                                reg = <0x9000 0x1000>;
                                interrupt-parent = <&sic>;
index def538ce8769d9d593d9e21ab7087c2122deb756..c5e92f6d2fcd8a6ff0d05dcfd5f7b4ff2b140ec7 100644 (file)
                                        clock-names = "KMIREFCLK", "apb_pclk";
                                };
 
-                               v2m_serial0: uart@9000 {
+                               v2m_serial0: serial@9000 {
                                        compatible = "arm,pl011", "arm,primecell";
                                        reg = <0x09000 0x1000>;
                                        interrupts = <5>;
                                        clock-names = "uartclk", "apb_pclk";
                                };
 
-                               v2m_serial1: uart@a000 {
+                               v2m_serial1: serial@a000 {
                                        compatible = "arm,pl011", "arm,primecell";
                                        reg = <0x0a000 0x1000>;
                                        interrupts = <6>;
                                        clock-names = "uartclk", "apb_pclk";
                                };
 
-                               v2m_serial2: uart@b000 {
+                               v2m_serial2: serial@b000 {
                                        compatible = "arm,pl011", "arm,primecell";
                                        reg = <0x0b000 0x1000>;
                                        interrupts = <7>;
                                        clock-names = "uartclk", "apb_pclk";
                                };
 
-                               v2m_serial3: uart@c000 {
+                               v2m_serial3: serial@c000 {
                                        compatible = "arm,pl011", "arm,primecell";
                                        reg = <0x0c000 0x1000>;
                                        interrupts = <8>;