habanalabs: don't limit packet size for device CPU
authorOded Gabbay <oded.gabbay@gmail.com>
Thu, 16 May 2019 22:08:23 +0000 (01:08 +0300)
committerOded Gabbay <oded.gabbay@gmail.com>
Thu, 16 May 2019 22:08:23 +0000 (01:08 +0300)
This patch removes a limitation on the maximum packet size that is read by
the device CPU as that limitation is not needed.

Therefore, the patch also removes an elaborate calculation that is based
on this limitation which is also not needed now. Instead, use a fixed
value for the memory pool size of the packets.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
drivers/misc/habanalabs/firmware_if.c
drivers/misc/habanalabs/goya/goya.c
drivers/misc/habanalabs/habanalabs.h

index 0cbdfa0d7fbadb2f39bb510cc5d4cbe616310df6..cc8168bacb24b3b90d2c8b7cf196246e8f1df7fe 100644 (file)
@@ -85,12 +85,6 @@ int hl_fw_send_cpu_message(struct hl_device *hdev, u32 hw_queue_id, u32 *msg,
        u32 tmp;
        int rc = 0;
 
-       if (len > HL_CPU_CB_SIZE) {
-               dev_err(hdev->dev, "Invalid CPU message size of %d bytes\n",
-                       len);
-               return -ENOMEM;
-       }
-
        pkt = hdev->asic_funcs->cpu_accessible_dma_pool_alloc(hdev, len,
                                                                &pkt_dma_addr);
        if (!pkt) {
@@ -181,9 +175,6 @@ void *hl_fw_cpu_accessible_dma_pool_alloc(struct hl_device *hdev, size_t size,
 {
        u64 kernel_addr;
 
-       /* roundup to HL_CPU_PKT_SIZE */
-       size = (size + (HL_CPU_PKT_SIZE - 1)) & HL_CPU_PKT_MASK;
-
        kernel_addr = gen_pool_alloc(hdev->cpu_accessible_dma_pool, size);
 
        *dma_handle = hdev->cpu_accessible_dma_address +
@@ -195,9 +186,6 @@ void *hl_fw_cpu_accessible_dma_pool_alloc(struct hl_device *hdev, size_t size,
 void hl_fw_cpu_accessible_dma_pool_free(struct hl_device *hdev, size_t size,
                                        void *vaddr)
 {
-       /* roundup to HL_CPU_PKT_SIZE */
-       size = (size + (HL_CPU_PKT_SIZE - 1)) & HL_CPU_PKT_MASK;
-
        gen_pool_free(hdev->cpu_accessible_dma_pool, (u64) (uintptr_t) vaddr,
                        size);
 }
index 6ee5db697ca5468845cbdaa4d426dbc98350f7a1..e0fc511acaec3f48ea575d6c877416ed8f94911e 100644 (file)
@@ -655,7 +655,7 @@ static int goya_sw_init(struct hl_device *hdev)
                goto free_dma_pool;
        }
 
-       hdev->cpu_accessible_dma_pool = gen_pool_create(HL_CPU_PKT_SHIFT, -1);
+       hdev->cpu_accessible_dma_pool = gen_pool_create(ilog2(32), -1);
        if (!hdev->cpu_accessible_dma_pool) {
                dev_err(hdev->dev,
                        "Failed to create CPU accessible DMA pool\n");
index 9b1c03f1ab320c3d90d19f2f51174ae2e2430bf2..0462b7727da71d99c06f91cf38f22f59871ffa9e 100644 (file)
@@ -320,18 +320,10 @@ struct hl_cs_job;
 #define HL_EQ_LENGTH                   64
 #define HL_EQ_SIZE_IN_BYTES            (HL_EQ_LENGTH * HL_EQ_ENTRY_SIZE)
 
-#define HL_CPU_PKT_SHIFT               5
-#define HL_CPU_PKT_SIZE                        (1 << HL_CPU_PKT_SHIFT)
-#define HL_CPU_PKT_MASK                        (~((1 << HL_CPU_PKT_SHIFT) - 1))
-#define HL_CPU_MAX_PKTS_IN_CB          32
-#define HL_CPU_CB_SIZE                 (HL_CPU_PKT_SIZE * \
-                                        HL_CPU_MAX_PKTS_IN_CB)
-#define HL_CPU_CB_QUEUE_SIZE           (HL_QUEUE_LENGTH * HL_CPU_CB_SIZE)
-
-/* KMD <-> ArmCP shared memory size (EQ + PQ + CPU CB queue) */
+/* KMD <-> ArmCP shared memory size (EQ + PQ + 2MB for packets) */
 #define HL_CPU_ACCESSIBLE_MEM_SIZE     (HL_EQ_SIZE_IN_BYTES + \
                                         HL_QUEUE_SIZE_IN_BYTES + \
-                                        HL_CPU_CB_QUEUE_SIZE)
+                                        SZ_2M)
 
 /**
  * struct hl_hw_queue - describes a H/W transport queue.