powerpc: warn on emulation of dcbz instruction in kernel mode
authorChristophe Leroy <christophe.leroy@csgroup.eu>
Thu, 16 Sep 2021 14:52:09 +0000 (16:52 +0200)
committerMichael Ellerman <mpe@ellerman.id.au>
Fri, 22 Oct 2021 04:22:05 +0000 (15:22 +1100)
dcbz instruction shouldn't be used on non-cached memory. Using
it on non-cached memory can result in alignment exception and
implies a heavy handling.

Instead of silentely emulating the instruction and resulting in high
performance degradation, warn whenever an alignment exception is
taken in kernel mode due to dcbz, so that the user is made aware that
dcbz instruction has been used unexpectedly by the kernel.

Reported-by: Stan Johnson <userm57@yahoo.com>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/2e3acfe63d289c6fba366e16973c9ab8369e8b75.1631803922.git.christophe.leroy@csgroup.eu
arch/powerpc/kernel/align.c

index bbb4181621ddcae8a630857b953d8436c398e47d..bf96b954a4eb2383468f0303a3b2ddd869a946a6 100644 (file)
@@ -349,6 +349,7 @@ int fix_alignment(struct pt_regs *regs)
                if (op.type != CACHEOP + DCBZ)
                        return -EINVAL;
                PPC_WARN_ALIGNMENT(dcbz, regs);
+               WARN_ON_ONCE(!user_mode(regs));
                r = emulate_dcbz(op.ea, regs);
        } else {
                if (type == LARX || type == STCX)