arm64: dts: realtek: rtd16xx: Introduce iso and misc syscon

Group UART0 into an Isolation syscon mfd node.
Group UART1 and UART2 into a Miscellaneous syscon mfd node.

Acked-by: James Tai <james.tai@realtek.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>

diff --git a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi
index 47e65fe50df36decad9dfdde0056b9b9a0a04647..5d81dbff3ca90ce2b173b4b7789284860503033f 100644 (file)
--- a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi
+++ b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi
@@ -137,34 +137,22 @@
                        #size-cells = <1>;
                        ranges = <0x0 0x98000000 0x200000>;
 
-                       uart0: serial0@7800 {
-                               compatible = "snps,dw-apb-uart";
-                               reg = <0x7800 0x400>;
-                               reg-shift = <2>;
+                       iso: syscon@7000 {
+                               compatible = "syscon", "simple-mfd";
+                               reg = <0x7000 0x1000>;
                                reg-io-width = <4>;
-                               interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
-                               clock-frequency = <27000000>;
-                               status = "disabled";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0x0 0x7000 0x1000>;
                        };
 
-                       uart1: serial1@1b200 {
-                               compatible = "snps,dw-apb-uart";
-                               reg = <0x1b200 0x400>;
-                               reg-shift = <2>;
+                       misc: syscon@1b000 {
+                               compatible = "syscon", "simple-mfd";
+                               reg = <0x1b000 0x1000>;
                                reg-io-width = <4>;
-                               interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
-                               clock-frequency = <432000000>;
-                               status = "disabled";
-                       };
-
-                       uart2: serial2@1b400 {
-                               compatible = "snps,dw-apb-uart";
-                               reg = <0x1b400 0x400>;
-                               reg-shift = <2>;
-                               reg-io-width = <4>;
-                               interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
-                               clock-frequency = <432000000>;
-                               status = "disabled";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0x0 0x1b000 0x1000>;
                        };
                };
 
@@ -178,3 +166,37 @@
                };
        };
 };
+
+&iso {
+       uart0: serial0@800 {
+               compatible = "snps,dw-apb-uart";
+               reg = <0x800 0x400>;
+               reg-shift = <2>;
+               reg-io-width = <4>;
+               interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+               clock-frequency = <27000000>;
+               status = "disabled";
+       };
+};
+
+&misc {
+       uart1: serial1@200 {
+               compatible = "snps,dw-apb-uart";
+               reg = <0x200 0x400>;
+               reg-shift = <2>;
+               reg-io-width = <4>;
+               interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+               clock-frequency = <432000000>;
+               status = "disabled";
+       };
+
+       uart2: serial2@400 {
+               compatible = "snps,dw-apb-uart";
+               reg = <0x400 0x400>;
+               reg-shift = <2>;
+               reg-io-width = <4>;
+               interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+               clock-frequency = <432000000>;
+               status = "disabled";
+       };
+};