pcie: pcie@1e140000 {
                compatible = "mediatek,mt7621-pci";
-               reg = <0x1e140000 0x100     /* host-pci bridge registers */
-                       0x1e142000 0x100    /* pcie port 0 RC control registers */
-                       0x1e143000 0x100    /* pcie port 1 RC control registers */
-                       0x1e144000 0x100>;  /* pcie port 2 RC control registers */
+               reg = <0x1e140000 0x100>, /* host-pci bridge registers */
+                     <0x1e142000 0x100>, /* pcie port 0 RC control registers */
+                     <0x1e143000 0x100>, /* pcie port 1 RC control registers */
+                     <0x1e144000 0x100>; /* pcie port 2 RC control registers */
                #address-cells = <3>;
                #size-cells = <2>;
 
                device_type = "pci";
 
                bus-range = <0 255>;
-               ranges = <
-                       0x02000000 0 0x00000000 0x60000000 0 0x10000000 /* pci memory */
-                       0x01000000 0 0x00000000 0x1e160000 0 0x00010000 /* io space */
-               >;
+               ranges = <0x02000000 0 0x00000000 0x60000000 0 0x10000000>, /* pci memory */
+                        <0x01000000 0 0x00000000 0x1e160000 0 0x00010000>; /* io space */
 
                #interrupt-cells = <1>;
                interrupt-map-mask = <0xF800 0 0 0>;
 
                status = "disabled";
 
-               resets = <&rstctrl 24 &rstctrl 25 &rstctrl 26>;
+               resets = <&rstctrl 24>, <&rstctrl 25>, <&rstctrl 26>;
                reset-names = "pcie0", "pcie1", "pcie2";
                clocks = <&sysc MT7621_CLK_PCIE0>,
                         <&sysc MT7621_CLK_PCIE1>,