clk: stratix10: use do_div() for 64-bit calculation

do_div() macro to perform u64 division and guards against overflow if
the result is too large for the unsigned long return type.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lkml.kernel.org/r/20200114160726.19771-1-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/drivers/clk/socfpga/clk-pll-s10.c b/drivers/clk/socfpga/clk-pll-s10.c
index 4705eb544f01bdb90baa69b0ef006c773e159a9e..8d7b1d0c46643d01b560ff0e79eddd1123f2ac63 100644 (file)
--- a/drivers/clk/socfpga/clk-pll-s10.c
+++ b/drivers/clk/socfpga/clk-pll-s10.c
@@ -39,7 +39,9 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hwclk,
        /* read VCO1 reg for numerator and denominator */
        reg = readl(socfpgaclk->hw.reg);
        refdiv = (reg & SOCFPGA_PLL_REFDIV_MASK) >> SOCFPGA_PLL_REFDIV_SHIFT;
-       vco_freq = (unsigned long long)parent_rate / refdiv;
+
+       vco_freq = parent_rate;
+       do_div(vco_freq, refdiv);
 
        /* Read mdiv and fdiv from the fdbck register */
        reg = readl(socfpgaclk->hw.reg + 0x4);