drm/msm/dpu: fix clock scaling on non-sc7180 board
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tue, 27 Oct 2020 10:23:04 +0000 (13:23 +0300)
committerRob Clark <robdclark@chromium.org>
Wed, 4 Nov 2020 16:26:26 +0000 (08:26 -0800)
c33b7c0389e1 ("drm/msm/dpu: add support for clk and bw scaling for
display") has added support for handling bandwidth voting in kms path in
addition to old mdss path. However this broke all other platforms since
_dpu_core_perf_crtc_update_bus() will now error out instead of properly
calculating bandwidth and core clocks. Fix
_dpu_core_perf_crtc_update_bus() to just skip bandwidth setting instead
of returning an error in case kms->num_paths == 0 (MDSS is used for
bandwidth management).

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fixes: c33b7c0389e1 ("drm/msm/dpu: add support for clk and bw scaling for display")
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

index 393858ef8a8325ab0dc22a4b3023902fe30e67af..37c8270681c23a0a1c6342dafbb0122ec97c388d 100644 (file)
@@ -219,9 +219,6 @@ static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms,
        int i, ret = 0;
        u64 avg_bw;
 
-       if (!kms->num_paths)
-               return -EINVAL;
-
        drm_for_each_crtc(tmp_crtc, crtc->dev) {
                if (tmp_crtc->enabled &&
                        curr_client_type ==
@@ -239,6 +236,9 @@ static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms,
                }
        }
 
+       if (!kms->num_paths)
+               return 0;
+
        avg_bw = perf.bw_ctl;
        do_div(avg_bw, (kms->num_paths * 1000)); /*Bps_to_icc*/