arm64: dts: qcom: sm6350: add debug uart

Add the necessary nodes for the debug uart on SM6350.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007212444.328034-8-luca@z3ntu.xyz

diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 926d30c57addfb260be3a0d7aea140d3168a755b..973e18fe3b6748410d74b074cc30fcbfc4c3b0c0 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -443,6 +443,30 @@
                        };
                };
 
+               qupv3_id_1: geniqup@9c0000 {
+                       compatible = "qcom,geni-se-qup";
+                       reg = <0x0 0x9c0000 0x0 0x2000>;
+                       clock-names = "m-ahb", "s-ahb";
+                       clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
+                                <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       iommus = <&apps_smmu 0x4c3 0x0>;
+                       ranges;
+                       status = "disabled";
+
+                       uart2: serial@98c000 {
+                               compatible = "qcom,geni-debug-uart";
+                               reg = <0 0x98c000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&qup_uart2_default>;
+                               interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+                               status = "disabled";
+                       };
+               };
+
                tcsr_mutex: hwlock@1f40000 {
                        compatible = "qcom,tcsr-mutex";
                        reg = <0x0 0x01f40000 0x0 0x40000>;
@@ -670,6 +694,13 @@
                        interrupt-controller;
                        #interrupt-cells = <2>;
                        gpio-ranges = <&tlmm 0 0 157>;
+
+                       qup_uart2_default: qup-uart2-default {
+                               pins = "gpio25", "gpio26";
+                               function = "qup13_f2";
+                               drive-strength = <2>;
+                               bias-disable;
+                       };
                };
 
                apps_smmu: iommu@15000000 {