ARM: dts: imx6: rdu2: Disable WP for USDHC2 and USDHC3
authorAndrey Smirnov <andrew.smirnov@gmail.com>
Mon, 9 Dec 2019 16:50:17 +0000 (08:50 -0800)
committerShawn Guo <shawnguo@kernel.org>
Thu, 12 Dec 2019 01:31:32 +0000 (09:31 +0800)
RDU2 production units come with resistor connecting WP pin to
correpsonding GPIO DNPed for both SD card slots. Drop any WP related
configuration and mark both slots with "disable-wp".

Reported-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi

index 176dbc16f4e7a6a904d743e908953730b1ce8256..294c49254e5777926e328344bfff4945a5581878 100644 (file)
        pinctrl-0 = <&pinctrl_usdhc2>;
        bus-width = <4>;
        cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
-       wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
+       disable-wp;
        vmmc-supply = <&reg_3p3v_sd>;
        vqmmc-supply = <&reg_3p3v>;
        no-1-8-v;
        pinctrl-0 = <&pinctrl_usdhc3>;
        bus-width = <4>;
        cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
-       wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
+       disable-wp;
        vmmc-supply = <&reg_3p3v_sd>;
        vqmmc-supply = <&reg_3p3v>;
        no-1-8-v;
                        MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
                        MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
                        MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
-                       MX6QDL_PAD_NANDF_D3__GPIO2_IO03         0x40010040
                        MX6QDL_PAD_NANDF_D2__GPIO2_IO02         0x40010040
                >;
        };
                        MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
                        MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
                        MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
-                       MX6QDL_PAD_NANDF_D1__GPIO2_IO01         0x40010040
                        MX6QDL_PAD_NANDF_D0__GPIO2_IO00         0x40010040
 
                >;