rtc: sirfsoc: set range

This RTC is a 32bit counter running at 16Hz. This overflows every eight
years and a half. However, the driver uses the SW_VALUE register to store
the overflow, extending the counter to 64bit as long as the update happens
before the overflow.

Link: https://lore.kernel.org/r/20200305160452.27808-2-alexandre.belloni@bootlin.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

diff --git a/drivers/rtc/rtc-sirfsoc.c b/drivers/rtc/rtc-sirfsoc.c
index b2e72597eee8a51140ed96b0ee6c330a2737bd17..8b3c88fb979305f3d8d6f2c7d05b96f62036b0a2 100644 (file)
--- a/drivers/rtc/rtc-sirfsoc.c
+++ b/drivers/rtc/rtc-sirfsoc.c
@@ -346,6 +346,7 @@ static int sirfsoc_rtc_probe(struct platform_device *pdev)
                return PTR_ERR(rtcdrv->rtc);
 
        rtcdrv->rtc->ops = &sirfsoc_rtc_ops;
+       rtcdrv->rtc->range_max = (1ULL << 60) - 1;
 
        rtcdrv->irq = platform_get_irq(pdev, 0);
        err = devm_request_irq(&pdev->dev, rtcdrv->irq, sirfsoc_rtc_irq_handler,