tools/power/turbostat: Adjust cstate for is_slm()/is_knl()/is_cnl()/is_ehl() models

Disable CC3 for is_slm()/is_knl()/is_cnl()/is_ehl() models.

Delete is_cnl()/is_ehl() CPU model checks.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>

diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
index b0bc973c077de536c4cca03650b779c99e9ab61c..24f470883ca24cb60d776c5d2aa1c8aa1d9d1b8d 100644 (file)
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@ -585,7 +585,7 @@ static const struct platform_features cnl_features = {
        .has_nhm_msrs = 1,
        .has_config_tdp = 1,
        .bclk_freq = BCLK_100MHZ,
-       .supported_cstates = CC1 | CC3 | CC6 | CC7 | PC2 | PC3 | PC6 | PC7 | PC8 | PC9 | PC10,
+       .supported_cstates = CC1 | CC6 | CC7 | PC2 | PC3 | PC6 | PC7 | PC8 | PC9 | PC10,
        .cst_limit = CST_LIMIT_HSW,
        .trl_msrs = TRL_BASE,
        .tcc_offset_bits = 6,
@@ -635,7 +635,7 @@ static const struct platform_features spr_features = {
 static const struct platform_features slv_features = {
        .has_nhm_msrs = 1,
        .bclk_freq = BCLK_SLV,
-       .supported_cstates = CC1 | CC3 | CC6 | PC6,
+       .supported_cstates = CC1 | CC6 | PC6,
        .cst_limit = CST_LIMIT_SLV,
        .trl_msrs = TRL_ATOM,
        .rapl_msrs = RAPL_PKG | RAPL_CORE,
@@ -647,7 +647,7 @@ static const struct platform_features slvd_features = {
        .has_msr_misc_pwr_mgmt = 1,
        .has_nhm_msrs = 1,
        .bclk_freq = BCLK_SLV,
-       .supported_cstates = CC1 | CC3 | CC6 | PC3 | PC6,
+       .supported_cstates = CC1 | CC6 | PC3 | PC6,
        .cst_limit = CST_LIMIT_SLV,
        .trl_msrs = TRL_BASE,
        .rapl_msrs = RAPL_PKG | RAPL_CORE,
@@ -699,7 +699,7 @@ static const struct platform_features tmt_features = {
        .has_msr_misc_pwr_mgmt = 1,
        .has_nhm_msrs = 1,
        .bclk_freq = BCLK_100MHZ,
-       .supported_cstates = CC1 | CC3 | CC6 | CC7 | PC2 | PC3 | PC6 | PC7 | PC8 | PC9 | PC10,
+       .supported_cstates = CC1 | CC6 | CC7 | PC2 | PC3 | PC6 | PC7 | PC8 | PC9 | PC10,
        .cst_limit = CST_LIMIT_GMT,
        .trl_msrs = TRL_BASE,
        .rapl_msrs = RAPL_PKG_ALL | RAPL_CORE_ALL | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_GFX,
@@ -721,7 +721,7 @@ static const struct platform_features knl_features = {
        .has_nhm_msrs = 1,
        .has_config_tdp = 1,
        .bclk_freq = BCLK_100MHZ,
-       .supported_cstates = CC1 | CC3 | CC6 | PC3 | PC6,
+       .supported_cstates = CC1 | CC6 | PC3 | PC6,
        .cst_limit = CST_LIMIT_KNL,
        .trl_msrs = TRL_KNL,
        .rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL,
@@ -4314,21 +4314,6 @@ int is_spr(unsigned int family, unsigned int model)
        return 0;
 }
 
-int is_ehl(unsigned int family, unsigned int model)
-{
-       if (!genuine_intel)
-               return 0;
-
-       if (family != 6)
-               return 0;
-
-       switch (model) {
-       case INTEL_FAM6_ATOM_TREMONT:
-               return 1;
-       }
-       return 0;
-}
-
 static void remove_underbar(char *s)
 {
        char *to = s;
@@ -5248,22 +5233,6 @@ int is_knl(unsigned int family, unsigned int model)
        return 0;
 }
 
-int is_cnl(unsigned int family, unsigned int model)
-{
-       if (!genuine_intel)
-               return 0;
-
-       if (family != 6)
-               return 0;
-
-       switch (model) {
-       case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
-               return 1;
-       }
-
-       return 0;
-}
-
 unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
 {
        if (is_knl(family, model))
@@ -5798,9 +5767,6 @@ void process_cpuid()
        do_slm_cstates = is_slm(family, model);
        do_knl_cstates = is_knl(family, model);
 
-       if (do_slm_cstates || do_knl_cstates || is_cnl(family, model) || is_ehl(family, model))
-               BIC_NOT_PRESENT(BIC_CPU_c3);
-
        if (!quiet)
                decode_misc_pwr_mgmt_msr();