uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev)
 {
-       uint64_t addr = min(adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT,
-                               AMDGPU_GMC_HOLE_START);
+       uint64_t addr = adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT;
 
        addr -= AMDGPU_VA_RESERVED_SIZE;
        addr = amdgpu_gmc_sign_extend(addr);
 
                 * vm size is 256TB (48bit), maximum size of Vega10,
                 * block size 512 (9bit)
                 */
-               amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48);
+               /* sriov restrict max_pfn below AMDGPU_GMC_HOLE */
+               if (amdgpu_sriov_vf(adev))
+                       amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 47);
+               else
+                       amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48);
                break;
        default:
                break;