clk: renesas: r8a77965: Add MSIOF controller clocks

This patch adds MSIOF{0,1,2,3} clocks to the R8A77965 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
index b1acfb60351ca35bed1ca9814fd4b011f5d502e2..8fae5e9c4a77242d9ea1615f14e1cf08e6507b8e 100644 (file)
--- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -116,6 +116,10 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
        DEF_MOD("scif3",                204,    R8A77965_CLK_S3D4),
        DEF_MOD("scif1",                206,    R8A77965_CLK_S3D4),
        DEF_MOD("scif0",                207,    R8A77965_CLK_S3D4),
+       DEF_MOD("msiof3",               208,    R8A77965_CLK_MSO),
+       DEF_MOD("msiof2",               209,    R8A77965_CLK_MSO),
+       DEF_MOD("msiof1",               210,    R8A77965_CLK_MSO),
+       DEF_MOD("msiof0",               211,    R8A77965_CLK_MSO),
        DEF_MOD("sys-dmac2",            217,    R8A77965_CLK_S0D3),
        DEF_MOD("sys-dmac1",            218,    R8A77965_CLK_S0D3),
        DEF_MOD("sys-dmac0",            219,    R8A77965_CLK_S0D3),