staging: sm750fb: change definition of CRT_DISPLAY_CTRL multi-bit fields

Use more straight-forward definitions for multi-bit fields of
CRT_DISPLAY_CTRL register and use open-coded implementation for register
manipulation

Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/sm750fb/ddk750_display.c b/drivers/staging/sm750fb/ddk750_display.c
index 7bb6fd4276080e98c40f98b595900a741d9de153..ca4973ee49e4204780026434071c4220b1d2af6d 100644 (file)
--- a/drivers/staging/sm750fb/ddk750_display.c
+++ b/drivers/staging/sm750fb/ddk750_display.c
@@ -153,7 +153,9 @@ void ddk750_setLogicalDispOut(disp_output_t output)
        if (output & CRT_2_USAGE) {
                /* set crt path controller select */
                reg = PEEK32(CRT_DISPLAY_CTRL);
-               reg = FIELD_VALUE(reg, CRT_DISPLAY_CTRL, SELECT, (output & CRT_2_MASK)>>CRT_2_OFFSET);
+               reg &= ~CRT_DISPLAY_CTRL_SELECT_MASK;
+               reg |= (((output & CRT_2_MASK) >> CRT_2_OFFSET) <<
+                       CRT_DISPLAY_CTRL_SELECT_SHIFT);
                /*se blank off */
                reg &= ~CRT_DISPLAY_CTRL_BLANK;
                POKE32(CRT_DISPLAY_CTRL, reg);

diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c
index 96fd4bfb34948995f4f782c42ddc08f9cf8f49d1..9ec3c6481f8d4a296c07983928a70e804e7fe99b 100644 (file)
--- a/drivers/staging/sm750fb/ddk750_mode.c
+++ b/drivers/staging/sm750fb/ddk750_mode.c
@@ -39,26 +39,26 @@ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam,
         */
 
        /* Clear bit 29:27 of display control register */
-       dispControl &= FIELD_CLEAR(CRT_DISPLAY_CTRL, CLK);
+       dispControl &= ~CRT_DISPLAY_CTRL_CLK_MASK;
 
        /* Set bit 29:27 of display control register for the right clock */
        /* Note that SM750LE only need to supported 7 resolutions. */
        if (x == 800 && y == 600)
-               dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL41);
+               dispControl |= CRT_DISPLAY_CTRL_CLK_PLL41;
        else if (x == 1024 && y == 768)
-               dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL65);
+               dispControl |= CRT_DISPLAY_CTRL_CLK_PLL65;
        else if (x == 1152 && y == 864)
-               dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL80);
+               dispControl |= CRT_DISPLAY_CTRL_CLK_PLL80;
        else if (x == 1280 && y == 768)
-               dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL80);
+               dispControl |= CRT_DISPLAY_CTRL_CLK_PLL80;
        else if (x == 1280 && y == 720)
-               dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL74);
+               dispControl |= CRT_DISPLAY_CTRL_CLK_PLL74;
        else if (x == 1280 && y == 960)
-               dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL108);
+               dispControl |= CRT_DISPLAY_CTRL_CLK_PLL108;
        else if (x == 1280 && y == 1024)
-               dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL108);
+               dispControl |= CRT_DISPLAY_CTRL_CLK_PLL108;
        else /* default to VGA clock */
-       dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL25);
+               dispControl |= CRT_DISPLAY_CTRL_CLK_PLL25;
 
        /* Set bit 25:24 of display controller */
        dispControl |= (CRT_DISPLAY_CTRL_CRTSELECT | CRT_DISPLAY_CTRL_RGBBIT);

diff --git a/drivers/staging/sm750fb/ddk750_power.c b/drivers/staging/sm750fb/ddk750_power.c
index c85dfc509b043169c1f0a07c0c1501eea1108b5b..ec1cac2c1793e11185a051691ba2178f66043700 100644 (file)
--- a/drivers/staging/sm750fb/ddk750_power.c
+++ b/drivers/staging/sm750fb/ddk750_power.c
@@ -7,9 +7,9 @@ void ddk750_setDPMS(DPMS_t state)
        unsigned int value;
 
        if (getChipType() == SM750LE) {
-               value = PEEK32(CRT_DISPLAY_CTRL);
-               POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(value, CRT_DISPLAY_CTRL,
-                                                    DPMS, state));
+               value = PEEK32(CRT_DISPLAY_CTRL) & ~CRT_DISPLAY_CTRL_DPMS_MASK;
+               value |= (state << CRT_DISPLAY_CTRL_DPMS_SHIFT);
+               POKE32(CRT_DISPLAY_CTRL, value);
        } else {
                value = PEEK32(SYSTEM_CTRL);
                value = (value & ~SYSTEM_CTRL_DPMS_MASK) | state;

diff --git a/drivers/staging/sm750fb/ddk750_reg.h b/drivers/staging/sm750fb/ddk750_reg.h
index 446bb85e55e0181908561a42802a89dbb2f18d8e..d033d4ff05495605ffe26c4f812cbae93e4a9bb8 100644 (file)
--- a/drivers/staging/sm750fb/ddk750_reg.h
+++ b/drivers/staging/sm750fb/ddk750_reg.h
@@ -1317,20 +1317,21 @@
 #define CRT_DISPLAY_CTRL_RESERVED_MASK                0xfb008200
 
 /* SM750LE definition */
-#define CRT_DISPLAY_CTRL_DPMS                         31:30
-#define CRT_DISPLAY_CTRL_DPMS_0                       0
-#define CRT_DISPLAY_CTRL_DPMS_1                       1
-#define CRT_DISPLAY_CTRL_DPMS_2                       2
-#define CRT_DISPLAY_CTRL_DPMS_3                       3
-#define CRT_DISPLAY_CTRL_CLK                          29:27
-#define CRT_DISPLAY_CTRL_CLK_PLL25                    0
-#define CRT_DISPLAY_CTRL_CLK_PLL41                    1
-#define CRT_DISPLAY_CTRL_CLK_PLL62                    2
-#define CRT_DISPLAY_CTRL_CLK_PLL65                    3
-#define CRT_DISPLAY_CTRL_CLK_PLL74                    4
-#define CRT_DISPLAY_CTRL_CLK_PLL80                    5
-#define CRT_DISPLAY_CTRL_CLK_PLL108                   6
-#define CRT_DISPLAY_CTRL_CLK_RESERVED                 7
+#define CRT_DISPLAY_CTRL_DPMS_SHIFT                   30
+#define CRT_DISPLAY_CTRL_DPMS_MASK                    (0x3 << 30)
+#define CRT_DISPLAY_CTRL_DPMS_0                       (0x0 << 30)
+#define CRT_DISPLAY_CTRL_DPMS_1                       (0x1 << 30)
+#define CRT_DISPLAY_CTRL_DPMS_2                       (0x2 << 30)
+#define CRT_DISPLAY_CTRL_DPMS_3                       (0x3 << 30)
+#define CRT_DISPLAY_CTRL_CLK_MASK                     (0x7 << 27)
+#define CRT_DISPLAY_CTRL_CLK_PLL25                    (0x0 << 27)
+#define CRT_DISPLAY_CTRL_CLK_PLL41                    (0x1 << 27)
+#define CRT_DISPLAY_CTRL_CLK_PLL62                    (0x2 << 27)
+#define CRT_DISPLAY_CTRL_CLK_PLL65                    (0x3 << 27)
+#define CRT_DISPLAY_CTRL_CLK_PLL74                    (0x4 << 27)
+#define CRT_DISPLAY_CTRL_CLK_PLL80                    (0x5 << 27)
+#define CRT_DISPLAY_CTRL_CLK_PLL108                   (0x6 << 27)
+#define CRT_DISPLAY_CTRL_CLK_RESERVED                 (0x7 << 27)
 #define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC                BIT(26)
 
 /* SM750LE definition */
@@ -1344,21 +1345,22 @@
 #define CRT_DISPLAY_CTRL_EXPANSION                    BIT(22)
 #define CRT_DISPLAY_CTRL_VERTICAL_MODE                BIT(21)
 #define CRT_DISPLAY_CTRL_HORIZONTAL_MODE              BIT(20)
-#define CRT_DISPLAY_CTRL_SELECT                       19:18
-#define CRT_DISPLAY_CTRL_SELECT_PANEL                 0
-#define CRT_DISPLAY_CTRL_SELECT_VGA                   1
-#define CRT_DISPLAY_CTRL_SELECT_CRT                   2
-#define CRT_DISPLAY_CTRL_FIFO                         17:16
-#define CRT_DISPLAY_CTRL_FIFO_1                       0
-#define CRT_DISPLAY_CTRL_FIFO_3                       1
-#define CRT_DISPLAY_CTRL_FIFO_7                       2
-#define CRT_DISPLAY_CTRL_FIFO_11                      3
+#define CRT_DISPLAY_CTRL_SELECT_SHIFT                 18
+#define CRT_DISPLAY_CTRL_SELECT_MASK                  (0x3 << 18)
+#define CRT_DISPLAY_CTRL_SELECT_PANEL                 (0x0 << 18)
+#define CRT_DISPLAY_CTRL_SELECT_VGA                   (0x1 << 18)
+#define CRT_DISPLAY_CTRL_SELECT_CRT                   (0x2 << 18)
+#define CRT_DISPLAY_CTRL_FIFO_MASK                    (0x3 << 16)
+#define CRT_DISPLAY_CTRL_FIFO_1                       (0x0 << 16)
+#define CRT_DISPLAY_CTRL_FIFO_3                       (0x1 << 16)
+#define CRT_DISPLAY_CTRL_FIFO_7                       (0x2 << 16)
+#define CRT_DISPLAY_CTRL_FIFO_11                      (0x3 << 16)
 #define CRT_DISPLAY_CTRL_BLANK                        BIT(10)
-#define CRT_DISPLAY_CTRL_PIXEL                        7:4
-#define CRT_DISPLAY_CTRL_FORMAT                       1:0
-#define CRT_DISPLAY_CTRL_FORMAT_8                     0
-#define CRT_DISPLAY_CTRL_FORMAT_16                    1
-#define CRT_DISPLAY_CTRL_FORMAT_32                    2
+#define CRT_DISPLAY_CTRL_PIXEL_MASK                   (0xf << 4)
+#define CRT_DISPLAY_CTRL_FORMAT_MASK                  (0x3 << 0)
+#define CRT_DISPLAY_CTRL_FORMAT_8                     (0x0 << 0)
+#define CRT_DISPLAY_CTRL_FORMAT_16                    (0x1 << 0)
+#define CRT_DISPLAY_CTRL_FORMAT_32                    (0x2 << 0)
 
 #define CRT_FB_ADDRESS                                0x080204
 #define CRT_FB_ADDRESS_STATUS                         31:31

diff --git a/drivers/staging/sm750fb/sm750_hw.c b/drivers/staging/sm750fb/sm750_hw.c
index ce08e6c13f03b3d88908236ef93b3408c55e3692..2b1cb9a6fbe7809792181a38971f86b053ac4fcd 100644 (file)
--- a/drivers/staging/sm750fb/sm750_hw.c
+++ b/drivers/staging/sm750fb/sm750_hw.c
@@ -352,7 +352,8 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc,
 
                /* SET PIXEL FORMAT */
                reg = PEEK32(CRT_DISPLAY_CTRL);
-               reg = FIELD_VALUE(reg, CRT_DISPLAY_CTRL, FORMAT, var->bits_per_pixel >> 4);
+               reg |= ((var->bits_per_pixel >> 4) &
+                       CRT_DISPLAY_CTRL_FORMAT_MASK);
                POKE32(CRT_DISPLAY_CTRL, reg);
 
        }
@@ -403,7 +404,8 @@ int hw_sm750le_setBLANK(struct lynxfb_output *output, int blank)
        if (output->paths & sm750_crt) {
                unsigned int val;
 
-               POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, DPMS, dpms));
+               val = PEEK32(CRT_DISPLAY_CTRL) & ~CRT_DISPLAY_CTRL_DPMS_MASK;
+               POKE32(CRT_DISPLAY_CTRL, val | dpms);
 
                val = PEEK32(CRT_DISPLAY_CTRL) & ~CRT_DISPLAY_CTRL_BLANK;
                POKE32(CRT_DISPLAY_CTRL, val | crtdb);