* Since the addr regs are sprinkled all over the address space,
  * use this array to get the address or each register.
  */
-#define I2C_NUM_OWN_ADDR 10
+#define I2C_NUM_OWN_ADDR 2
+#define I2C_NUM_OWN_ADDR_SUPPORTED 2
+
 static const int npcm_i2caddr[I2C_NUM_OWN_ADDR] = {
-       NPCM_I2CADDR1, NPCM_I2CADDR2, NPCM_I2CADDR3, NPCM_I2CADDR4,
-       NPCM_I2CADDR5, NPCM_I2CADDR6, NPCM_I2CADDR7, NPCM_I2CADDR8,
-       NPCM_I2CADDR9, NPCM_I2CADDR10,
+       NPCM_I2CADDR1, NPCM_I2CADDR2,
 };
 #endif
 
 #if IS_ENABLED(CONFIG_I2C_SLAVE)
        int i;
 
-       /* select bank 0 for I2C addresses */
-       npcm_i2c_select_bank(bus, I2C_BANK_0);
-
        /* Slave addresses removal */
-       for (i = I2C_SLAVE_ADDR1; i < I2C_NUM_OWN_ADDR; i++)
+       for (i = I2C_SLAVE_ADDR1; i < I2C_NUM_OWN_ADDR_SUPPORTED; i++)
                iowrite8(0, bus->reg + npcm_i2caddr[i]);
 
-       npcm_i2c_select_bank(bus, I2C_BANK_1);
 #endif
        /* Disable module */
        i2cctl2 = ioread8(bus->reg + NPCM_I2CCTL2);
                        i2cctl1 &= ~NPCM_I2CCTL1_GCMEN;
                iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1);
                return 0;
-       }
-       if (addr_type == I2C_ARP_ADDR) {
+       } else if (addr_type == I2C_ARP_ADDR) {
                i2cctl3 = ioread8(bus->reg + NPCM_I2CCTL3);
                if (enable)
                        i2cctl3 |= I2CCTL3_ARPMEN;
                iowrite8(i2cctl3, bus->reg + NPCM_I2CCTL3);
                return 0;
        }
+       if (addr_type > I2C_SLAVE_ADDR2 && addr_type <= I2C_SLAVE_ADDR10)
+               dev_err(bus->dev, "try to enable more than 2 SA not supported\n");
+
        if (addr_type >= I2C_ARP_ADDR)
                return -EFAULT;
-       /* select bank 0 for address 3 to 10 */
-       if (addr_type > I2C_SLAVE_ADDR2)
-               npcm_i2c_select_bank(bus, I2C_BANK_0);
+
        /* Set and enable the address */
        iowrite8(sa_reg, bus->reg + npcm_i2caddr[addr_type]);
        npcm_i2c_slave_int_enable(bus, enable);
-       if (addr_type > I2C_SLAVE_ADDR2)
-               npcm_i2c_select_bank(bus, I2C_BANK_1);
+
        return 0;
 }
 #endif
 {
        u8 slave_add;
 
-       /* select bank 0 for address 3 to 10 */
-       if (addr_type > I2C_SLAVE_ADDR2)
-               npcm_i2c_select_bank(bus, I2C_BANK_0);
+       if (addr_type > I2C_SLAVE_ADDR2 && addr_type <= I2C_SLAVE_ADDR10)
+               dev_err(bus->dev, "get slave: try to use more than 2 SA not supported\n");
 
        slave_add = ioread8(bus->reg + npcm_i2caddr[(int)addr_type]);
 
-       if (addr_type > I2C_SLAVE_ADDR2)
-               npcm_i2c_select_bank(bus, I2C_BANK_1);
-
        return slave_add;
 }
 
 
        /* Set the enable bit */
        slave_add |= 0x80;
-       npcm_i2c_select_bank(bus, I2C_BANK_0);
-       for (i = I2C_SLAVE_ADDR1; i < I2C_NUM_OWN_ADDR; i++) {
+
+       for (i = I2C_SLAVE_ADDR1; i < I2C_NUM_OWN_ADDR_SUPPORTED; i++) {
                if (ioread8(bus->reg + npcm_i2caddr[i]) == slave_add)
                        iowrite8(0, bus->reg + npcm_i2caddr[i]);
        }
-       npcm_i2c_select_bank(bus, I2C_BANK_1);
+
        return 0;
 }