struct intel_crtc_state *crtc_state);
 static int i9xx_get_refclk(const struct intel_crtc_state *crtc_state,
                           int num_connectors);
+static void intel_crtc_enable_planes(struct drm_crtc *crtc);
+static void intel_crtc_disable_planes(struct drm_crtc *crtc);
 
 static struct intel_encoder *intel_find_encoder(struct intel_connector *connector, int pipe)
 {
        }
 }
 
+void intel_crtc_reset(struct intel_crtc *crtc)
+{
+       struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+
+       if (!crtc->active)
+               return;
+
+       intel_crtc_disable_planes(&crtc->base);
+       dev_priv->display.crtc_disable(&crtc->base);
+       dev_priv->display.crtc_enable(&crtc->base);
+       intel_crtc_enable_planes(&crtc->base);
+}
+
 void intel_prepare_reset(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = to_i915(dev);
         * g33 docs say we should at least disable all the planes.
         */
        for_each_intel_crtc(dev, crtc) {
-               if (crtc->active)
-                       dev_priv->display.crtc_disable(&crtc->base);
+               if (!crtc->active)
+                       continue;
+
+               intel_crtc_disable_planes(&crtc->base);
+               dev_priv->display.crtc_disable(&crtc->base);
        }
 }
 
 
 static void intel_crtc_enable_planes(struct drm_crtc *crtc)
 {
-       struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-
        intel_enable_primary_hw_plane(crtc->primary, crtc);
        intel_enable_sprite_planes(crtc);
        intel_crtc_update_cursor(crtc, true);
 
        if (HAS_PCH_CPT(dev))
                cpt_verify_modeset(dev, intel_crtc->pipe);
-
-       intel_crtc_enable_planes(crtc);
 }
 
 /* IPS only exists on ULT machines and is tied to pipe A. */
        /* If we change the relative order between pipe/planes enabling, we need
         * to change the workaround. */
        haswell_mode_set_planes_workaround(intel_crtc);
-       intel_crtc_enable_planes(crtc);
 }
 
 static void ironlake_pfit_disable(struct intel_crtc *crtc)
        if (!intel_crtc->active)
                return;
 
-       intel_crtc_disable_planes(crtc);
-
        for_each_encoder_on_crtc(dev, crtc, encoder)
                encoder->disable(encoder);
 
        if (!intel_crtc->active)
                return;
 
-       intel_crtc_disable_planes(crtc);
-
        for_each_encoder_on_crtc(dev, crtc, encoder) {
                intel_opregion_notify_encoder(encoder, false);
                encoder->disable(encoder);
 
        for_each_encoder_on_crtc(dev, crtc, encoder)
                encoder->enable(encoder);
-
-       intel_crtc_enable_planes(crtc);
 }
 
 static void i9xx_set_pll_dividers(struct intel_crtc *crtc)
 
        for_each_encoder_on_crtc(dev, crtc, encoder)
                encoder->enable(encoder);
-
-       intel_crtc_enable_planes(crtc);
 }
 
 static void i9xx_pfit_disable(struct intel_crtc *crtc)
        if (!intel_crtc->active)
                return;
 
-       intel_crtc_disable_planes(crtc);
-
        /*
         * On gen2 planes are double buffered but the pipe isn't, so we must
         * wait for planes to fully turn off before disabling the pipe.
                        intel_crtc->enabled_power_domains = domains;
 
                        dev_priv->display.crtc_enable(crtc);
+                       intel_crtc_enable_planes(crtc);
                }
        } else {
                if (intel_crtc->active) {
+                       intel_crtc_disable_planes(crtc);
                        dev_priv->display.crtc_disable(crtc);
 
                        domains = intel_crtc->enabled_power_domains;
        /* crtc should still be enabled when we disable it. */
        WARN_ON(!crtc->state->enable);
 
+       intel_crtc_disable_planes(crtc);
        dev_priv->display.crtc_disable(crtc);
        dev_priv->display.off(crtc);
 
                intel_crtc_disable(&intel_crtc->base);
 
        for_each_intel_crtc_masked(dev, prepare_pipes, intel_crtc) {
-               if (intel_crtc->base.state->enable)
+               if (intel_crtc->base.state->enable) {
+                       intel_crtc_disable_planes(&intel_crtc->base);
                        dev_priv->display.crtc_disable(&intel_crtc->base);
+               }
        }
 
        /* crtc->mode is already used by the ->mode_set callbacks, hence we need
                update_scanline_offset(intel_crtc);
 
                dev_priv->display.crtc_enable(&intel_crtc->base);
+               intel_crtc_enable_planes(&intel_crtc->base);
        }
 
        /* FIXME: add subpixel order */
                plane = crtc->plane;
                to_intel_plane_state(crtc->base.primary->state)->visible = true;
                crtc->plane = !plane;
+               intel_crtc_disable_planes(&crtc->base);
                dev_priv->display.crtc_disable(&crtc->base);
                crtc->plane = plane;