ARM: dts: qcom: sdx55: Add interconnect nodes
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Thu, 8 Apr 2021 17:04:50 +0000 (22:34 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Wed, 14 Apr 2021 02:06:31 +0000 (21:06 -0500)
Add interconnect nodes for the providers in SDX55 platform.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210408170457.91409-9-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm/boot/dts/qcom-sdx55.dtsi

index daf34f24a5d33e0887aaabaa393de07b93e35ca6..3372e076f9bd79f869d4bda262f4acb120748c65 100644 (file)
@@ -8,6 +8,7 @@
 
 #include <dt-bindings/clock/qcom,gcc-sdx55.h>
 #include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/interconnect/qcom,sdx55.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
                        };
                };
 
+               mc_virt: interconnect@1100000 {
+                       compatible = "qcom,sdx55-mc-virt";
+                       reg = <0x01100000 0x400000>;
+                       #interconnect-cells = <1>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
+               mem_noc: interconnect@9680000 {
+                       compatible = "qcom,sdx55-mem-noc";
+                       reg = <0x09680000 0x40000>;
+                       #interconnect-cells = <1>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
+               system_noc: interconnect@162c000 {
+                       compatible = "qcom,sdx55-system-noc";
+                       reg = <0x0162c000 0x31200>;
+                       #interconnect-cells = <1>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
+               ipa_virt: interconnect@1e00000 {
+                       compatible = "qcom,sdx55-ipa-virt";
+                       reg = <0x01e00000 0x100000>;
+                       #interconnect-cells = <1>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
                qpic_bam: dma-controller@1b04000 {
                        compatible = "qcom,bam-v1.7.0";
                        reg = <0x01b04000 0x1c000>;
                                        };
                                };
                        };
+
+                       apps_bcm_voter: bcm_voter {
+                               compatible = "qcom,bcm-voter";
+                       };
                };
        };