riscv: dts: sifive: add missing #interrupt-cells to pmic
authorConor Dooley <conor.dooley@microchip.com>
Tue, 13 Feb 2024 19:45:40 +0000 (19:45 +0000)
committerConor Dooley <conor.dooley@microchip.com>
Wed, 14 Feb 2024 09:09:33 +0000 (09:09 +0000)
At W=2 dtc complains:
hifive-unmatched-a00.dts:120.10-238.4: Warning (interrupt_provider): /soc/i2c@10030000/pmic@58: Missing '#interrupt-cells' in interrupt provider

Add the missing property.

Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts

index 07387f9c135ca7e8ddf7d45de10ccdb933a2e4d4..72b87b08ab444ef1dc1ed200a6e8b3cbb9bfc73f 100644 (file)
                interrupt-parent = <&gpio>;
                interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
                interrupt-controller;
+               #interrupt-cells = <2>;
 
                onkey {
                        compatible = "dlg,da9063-onkey";