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clk: mvebu: armada-375: Fix the description of the SAR in the comment
author
Gregory CLEMENT
<gregory.clement@free-electrons.com>
Tue, 2 Sep 2014 08:15:19 +0000
(10:15 +0200)
committer
Jason Cooper
<jason@lakedaemon.net>
Tue, 9 Sep 2014 15:15:22 +0000
(15:15 +0000)
For dealing with the code we use the SAR1 and not the SAR0. The code
was correct, and now the comments too.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Leigh Brown <leigh@solinno.co.uk>
Link:
https://lkml.kernel.org/r/1409645719-20003-5-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
drivers/clk/mvebu/armada-375.c
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diff --git
a/drivers/clk/mvebu/armada-375.c
b/drivers/clk/mvebu/armada-375.c
index c991a4d95e108d594f7ab0930a202e7eb7ea7fe3..c7af2242b796866a9367b02c0a74827499901a1f 100644
(file)
--- a/
drivers/clk/mvebu/armada-375.c
+++ b/
drivers/clk/mvebu/armada-375.c
@@
-27,14
+27,14
@@
* all modified at the same time, and not separately as for the Armada
* 370 or the Armada XP SoCs.
*
- * SAR
0
[21:17] : CPU frequency DDR frequency L2 frequency
+ * SAR
1
[21:17] : CPU frequency DDR frequency L2 frequency
* 6 = 400 MHz 400 MHz 200 MHz
* 15 = 600 MHz 600 MHz 300 MHz
* 21 = 800 MHz 534 MHz 400 MHz
* 25 = 1000 MHz 500 MHz 500 MHz
* others reserved.
*
- * SAR
0
[22] : TCLK frequency
+ * SAR
1
[22] : TCLK frequency
* 0 = 166 MHz
* 1 = 200 MHz
*/