ARM: dts: qcom: apq8084: Remove all instances of IRQ_TYPE_NONE

This patch removes all instances of IRQ_TYPE_NONE, which fixes warning
messages during boot. It also changes interrupt types to their
corresponding macros, as defined in arm-gic.h.

Signed-off by: Victhor Foster <victhor.foster@ufpe.br>
Link: https://lore.kernel.org/r/1238987932.9511963.1577060836760.JavaMail.zimbra@ufpe.br
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 26d79ff2af2234d4c3a5cdff885cbea1a29d0bfe..fa1852eed37bca244e5f9ba4b8185d3bc9596b59 100644 (file)
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 /dts-v1/;
 
+#include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-apq8084.h>
 #include <dt-bindings/gpio/gpio.h>
 
@@ -184,7 +185,7 @@
 
        cpu-pmu {
                compatible = "qcom,krait-pmu";
-               interrupts = <1 7 0xf04>;
+               interrupts = <GIC_PPI 7 0xf04>;
        };
 
        clocks {
@@ -203,10 +204,10 @@
 
        timer {
                compatible = "arm,armv7-timer";
-               interrupts = <1 2 0xf08>,
-                            <1 3 0xf08>,
-                            <1 4 0xf08>,
-                            <1 1 0xf08>;
+               interrupts = <GIC_PPI 2 0xf08>,
+                            <GIC_PPI 3 0xf08>,
+                            <GIC_PPI 4 0xf08>,
+                            <GIC_PPI 1 0xf08>;
                clock-frequency = <19200000>;
        };
 
@@ -260,7 +261,6 @@
                        #qcom,sensors = <11>;
                        #thermal-sensor-cells = <1>;
                };
-
                timer@f9020000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
@@ -271,50 +271,50 @@
 
                        frame@f9021000 {
                                frame-number = <0>;
-                               interrupts = <0 8 0x4>,
-                                            <0 7 0x4>;
+                               interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0xf9021000 0x1000>,
                                      <0xf9022000 0x1000>;
                        };
 
                        frame@f9023000 {
                                frame-number = <1>;
-                               interrupts = <0 9 0x4>;
+                               interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0xf9023000 0x1000>;
                                status = "disabled";
                        };
 
                        frame@f9024000 {
                                frame-number = <2>;
-                               interrupts = <0 10 0x4>;
+                               interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0xf9024000 0x1000>;
                                status = "disabled";
                        };
 
                        frame@f9025000 {
                                frame-number = <3>;
-                               interrupts = <0 11 0x4>;
+                               interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0xf9025000 0x1000>;
                                status = "disabled";
                        };
 
                        frame@f9026000 {
                                frame-number = <4>;
-                               interrupts = <0 12 0x4>;
+                               interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0xf9026000 0x1000>;
                                status = "disabled";
                        };
 
                        frame@f9027000 {
                                frame-number = <5>;
-                               interrupts = <0 13 0x4>;
+                               interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0xf9027000 0x1000>;
                                status = "disabled";
                        };
 
                        frame@f9028000 {
                                frame-number = <6>;
-                               interrupts = <0 14 0x4>;
+                               interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0xf9028000 0x1000>;
                                status = "disabled";
                        };
@@ -406,13 +406,13 @@
                        #gpio-cells = <2>;
                        interrupt-controller;
                        #interrupt-cells = <2>;
-                       interrupts = <0 208 0>;
+                       interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                blsp2_uart2: serial@f995e000 {
                        compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
                        reg = <0xf995e000 0x1000>;
-                       interrupts = <0 114 0x0>;
+                       interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
                        clock-names = "core", "iface";
                        status = "disabled";
@@ -422,7 +422,7 @@
                        compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
                        reg-names = "hc_mem", "core_mem";
-                       interrupts = <0 123 0>, <0 138 0>;
+                       interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
                        clocks = <&gcc GCC_SDCC1_APPS_CLK>,
                                 <&gcc GCC_SDCC1_AHB_CLK>,
@@ -435,7 +435,7 @@
                        compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
                        reg-names = "hc_mem", "core_mem";
-                       interrupts = <0 125 0>, <0 221 0>;
+                       interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "hc_irq", "pwr_irq";
                        clocks = <&gcc GCC_SDCC2_APPS_CLK>,
                                 <&gcc GCC_SDCC2_AHB_CLK>,
@@ -451,7 +451,7 @@
                              <0xfc4cb000 0x1000>,
                              <0xfc4ca000 0x1000>;
                        interrupt-names = "periph_irq";
-                       interrupts = <0 190 0>;
+                       interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
                        qcom,ee = <0>;
                        qcom,channel = <0>;
                        #address-cells = <2>;
@@ -465,7 +465,7 @@
                compatible = "qcom,smd";
 
                rpm {
-                       interrupts = <0 168 1>;
+                       interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
                        qcom,ipc = <&apcs 8 0>;
                        qcom,smd-edge = <15>;