drm/i915: Plane configuration affects CDCLK in Gen11+

So lets support it.

v2: - Fixed "from" field which got corrupted for some weird reason

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200520145945.15997-1-stanislav.lisovskiy@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 19543045266f9aa85b581252254232c8a7a04a1b..e1e6ec38f83b69ed5ee5d6705360a1292b0c6f8c 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -14643,7 +14643,7 @@ static bool active_planes_affects_min_cdclk(struct drm_i915_private *dev_priv)
        /* See {hsw,vlv,ivb}_plane_ratio() */
        return IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv) ||
                IS_CHERRYVIEW(dev_priv) || IS_VALLEYVIEW(dev_priv) ||
-               IS_IVYBRIDGE(dev_priv);
+               IS_IVYBRIDGE(dev_priv) || (INTEL_GEN(dev_priv) >= 11);
 }
 
 static int intel_atomic_check_planes(struct intel_atomic_state *state)