cxl/memdev: Add numa_node attribute
authorDan Williams <dan.j.williams@intel.com>
Mon, 24 Jan 2022 00:31:24 +0000 (16:31 -0800)
committerDan Williams <dan.j.williams@intel.com>
Wed, 9 Feb 2022 06:57:32 +0000 (22:57 -0800)
While CXL memory targets will have their own memory target node,
individual memory devices may be affinitized like other PCI devices.
Emit that attribute for memdevs.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/164298428430.3018233.16409089892707993289.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Documentation/ABI/testing/sysfs-bus-cxl
drivers/cxl/core/memdev.c
tools/testing/cxl/test/cxl.c

index 87c0e5e65322c6f56adcd85c9c5dfaa9816dbcaa..0b51cfec0c6681bdd57ff5e257b1b628b1168dd5 100644 (file)
@@ -34,6 +34,15 @@ Description:
                capability. Mandatory for CXL devices, see CXL 2.0 8.1.12.2
                Memory Device PCIe Capabilities and Extended Capabilities.
 
+What:          /sys/bus/cxl/devices/memX/numa_node
+Date:          January, 2022
+KernelVersion: v5.18
+Contact:       linux-cxl@vger.kernel.org
+Description:
+               (RO) If NUMA is enabled and the platform has affinitized the
+               host PCI device for this memory device, emit the CPU node
+               affinity for this device.
+
 What:          /sys/bus/cxl/devices/*/devtype
 Date:          June, 2021
 KernelVersion: v5.14
index 1e574b05258300f52881af8cf6470c7ae97a8833..b2773664e407ef48e77937ebd7e8c37cfbc3976f 100644 (file)
@@ -99,11 +99,19 @@ static ssize_t serial_show(struct device *dev, struct device_attribute *attr,
 }
 static DEVICE_ATTR_RO(serial);
 
+static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
+                             char *buf)
+{
+       return sprintf(buf, "%d\n", dev_to_node(dev));
+}
+static DEVICE_ATTR_RO(numa_node);
+
 static struct attribute *cxl_memdev_attributes[] = {
        &dev_attr_serial.attr,
        &dev_attr_firmware_version.attr,
        &dev_attr_payload_max.attr,
        &dev_attr_label_storage_size.attr,
+       &dev_attr_numa_node.attr,
        NULL,
 };
 
@@ -117,8 +125,17 @@ static struct attribute *cxl_memdev_ram_attributes[] = {
        NULL,
 };
 
+static umode_t cxl_memdev_visible(struct kobject *kobj, struct attribute *a,
+                                 int n)
+{
+       if (!IS_ENABLED(CONFIG_NUMA) && a == &dev_attr_numa_node.attr)
+               return 0;
+       return a->mode;
+}
+
 static struct attribute_group cxl_memdev_attribute_group = {
        .attrs = cxl_memdev_attributes,
+       .is_visible = cxl_memdev_visible,
 };
 
 static struct attribute_group cxl_memdev_ram_attribute_group = {
index 40ed567952e61d3ee546e645b1415483ba18807c..cd2f20f2707fa026a902ed4c5fd2602348719f42 100644 (file)
@@ -583,6 +583,7 @@ static __init int cxl_test_init(void)
                if (!pdev)
                        goto err_mem;
                pdev->dev.parent = &port->dev;
+               set_dev_node(&pdev->dev, i % 2);
 
                rc = platform_device_add(pdev);
                if (rc) {