riscv: dts: starfive: visionfive 2: correct spi's ss pin

The ss pin of spi0 is the same as sck pin. According to the
visionfive 2 documentation, it should be pin 49 instead of 48.

Fixes: 74fb20c8f05d ("riscv: dts: starfive: Add spi node and pins configuration")
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Nam Cao <namcao@linutronix.de>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 12ebe979235635bafc30a90207017f43bea93467..2c02358abd711a3d05374cd5cccdba1fe208d0e3 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -431,7 +431,7 @@
                };
 
                ss-pins {
-                       pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_FSS,
+                       pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS,
                                              GPOEN_ENABLE,
                                              GPI_SYS_SPI0_FSS)>;
                        bias-disable;