drm/xe: Mark VF accessible GuC registers
authorMichal Wajdeczko <michal.wajdeczko@intel.com>
Thu, 14 Mar 2024 17:31:27 +0000 (18:31 +0100)
committerMichał Winiarski <michal.winiarski@intel.com>
Fri, 15 Mar 2024 21:20:14 +0000 (22:20 +0100)
Only selected registers are available for Virtual Functions.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240314173130.1177-4-michal.wajdeczko@intel.com
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
drivers/gpu/drm/xe/regs/xe_guc_regs.h

index 4e7f809d2b00bf61dc65a7f08345b6ce07d4e48b..11682e675e0fc59d262fe6a208ffdd2eba988049 100644 (file)
 #define GT_PM_CONFIG                           XE_REG(0x13816c)
 #define   GT_DOORBELL_ENABLE                   REG_BIT(0)
 
-#define GUC_HOST_INTERRUPT                     XE_REG(0x1901f0)
+#define GUC_HOST_INTERRUPT                     XE_REG(0x1901f0, XE_REG_OPTION_VF)
 
-#define VF_SW_FLAG(n)                          XE_REG(0x190240 + (n) * 4)
+#define VF_SW_FLAG(n)                          XE_REG(0x190240 + (n) * 4, XE_REG_OPTION_VF)
 #define VF_SW_FLAG_COUNT                       4
 
-#define MED_GUC_HOST_INTERRUPT                 XE_REG(0x190304)
+#define MED_GUC_HOST_INTERRUPT                 XE_REG(0x190304, XE_REG_OPTION_VF)
 
-#define MED_VF_SW_FLAG(n)                      XE_REG(0x190310 + (n) * 4)
+#define MED_VF_SW_FLAG(n)                      XE_REG(0x190310 + (n) * 4, XE_REG_OPTION_VF)
 #define MED_VF_SW_FLAG_COUNT                   4
 
 #define GUC_TLB_INV_CR                         XE_REG(0xcee8)