ARM: dts: exynos: update dma node name with dtschema
authorAlim Akhtar <alim.akhtar@samsung.com>
Sun, 30 Jan 2022 07:55:18 +0000 (13:25 +0530)
committerKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Mon, 31 Jan 2022 08:59:33 +0000 (09:59 +0100)
Currently dma node name does not matches the pl330 dtschema and causes
dtbs_check to report below warning:

  'pdma@12680000' does not match '^dma-controller(@.*)?$'

Update the dma node name to match pl330 dtschema.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220130075520.49193-1-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
arch/arm/boot/dts/exynos3250.dtsi
arch/arm/boot/dts/exynos4.dtsi
arch/arm/boot/dts/exynos4210-universal_c210.dts
arch/arm/boot/dts/exynos5250.dtsi
arch/arm/boot/dts/exynos5410.dtsi
arch/arm/boot/dts/exynos5420.dtsi

index a10b789d8acfbc0919b0e558733c5909316ff951..ae644315855d4a1ca4b5d90a1002d6860e44ddc1 100644 (file)
                        status = "disabled";
                };
 
-               pdma0: pdma@12680000 {
+               pdma0: dma-controller@12680000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x12680000 0x1000>;
                        interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-requests = <32>;
                };
 
-               pdma1: pdma@12690000 {
+               pdma1: dma-controller@12690000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x12690000 0x1000>;
                        interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
index eab77a66ae8f2850c60db30a351068d5fedcebc2..e81b3ee4e0f72d22a9e95288e08b34bf49160b53 100644 (file)
                        status = "disabled";
                };
 
-               pdma0: pdma@12680000 {
+               pdma0: dma-controller@12680000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x12680000 0x1000>;
                        interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-requests = <32>;
                };
 
-               pdma1: pdma@12690000 {
+               pdma1: dma-controller@12690000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x12690000 0x1000>;
                        interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-requests = <32>;
                };
 
-               mdma1: mdma@12850000 {
+               mdma1: dma-controller@12850000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x12850000 0x1000>;
                        interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
index 9f93e7464aedd602816cc88f8da1e41ea03bc377..a46e4e1a6d299a8dbb059a5842496ff8d3c57c5d 100644 (file)
 };
 
 &soc {
-       mdma0: mdma@12840000 {
+       mdma0: dma-controller@12840000 {
                compatible = "arm,pl330", "arm,primecell";
                reg = <0x12840000 0x1000>;
                interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
index c6080bb75a624ba200df5060797e2c62016b26c5..5baaa7eb71a49fe8905ec93a7a527a0fb77be567 100644 (file)
                        samsung,pmureg-phandle = <&pmu_system_controller>;
                };
 
-               pdma0: pdma@121a0000 {
+               pdma0: dma-controller@121a0000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x121A0000 0x1000>;
                        interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-requests = <32>;
                };
 
-               pdma1: pdma@121b0000 {
+               pdma1: dma-controller@121b0000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x121B0000 0x1000>;
                        interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-requests = <32>;
                };
 
-               mdma0: mdma@10800000 {
+               mdma0: dma-controller@10800000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x10800000 0x1000>;
                        interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-requests = <1>;
                };
 
-               mdma1: mdma@11c10000 {
+               mdma1: dma-controller@11c10000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x11C10000 0x1000>;
                        interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
index 584ce62361b1342e44b33310ff806b342c77d146..4d797a9abba4b7677f445ceb40baf55b941d1ecd 100644 (file)
                        interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
                };
 
-               pdma0: pdma@121a0000 {
+               pdma0: dma-controller@121a0000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x121a0000 0x1000>;
                        interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-requests = <32>;
                };
 
-               pdma1: pdma@121b0000 {
+               pdma1: dma-controller@121b0000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x121b0000 0x1000>;
                        interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
index e23e8ffb093fa61095c6d2615cd8406eb31701b0..29e33cda14c49d436dd712e3ec31649b8da9f34a 100644 (file)
                        power-domains = <&mau_pd>;
                };
 
-               adma: adma@3880000 {
+               adma: dma-controller@3880000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x03880000 0x1000>;
                        interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
                        power-domains = <&mau_pd>;
                };
 
-               pdma0: pdma@121a0000 {
+               pdma0: dma-controller@121a0000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x121A0000 0x1000>;
                        interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-requests = <32>;
                };
 
-               pdma1: pdma@121b0000 {
+               pdma1: dma-controller@121b0000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x121B0000 0x1000>;
                        interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-requests = <32>;
                };
 
-               mdma0: mdma@10800000 {
+               mdma0: dma-controller@10800000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x10800000 0x1000>;
                        interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-requests = <1>;
                };
 
-               mdma1: mdma@11c10000 {
+               mdma1: dma-controller@11c10000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0x11C10000 0x1000>;
                        interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;