x86/apic: Consolidate wait_icr_idle() implementations

Two copies and also needlessly public. Move it into ipi.c so it can be
inlined. Rename it to apic_mem_wait_icr_idle().

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: Michael Kelley <mikelley@microsoft.com>
Tested-by: Sohil Mehta <sohil.mehta@intel.com>
Tested-by: Juergen Gross <jgross@suse.com> # Xen PV (dom0 and unpriv. guest)

diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 4fb71b7d597a5b0f1478d149a40b302002adc07f..1499865ebae78e938e69de295a44049a1ff8ab59 100644 (file)
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -98,7 +98,6 @@ static inline u32 native_apic_mem_read(u32 reg)
        return *((volatile u32 *)(APIC_BASE + reg));
 }
 
-extern void native_apic_wait_icr_idle(void);
 extern u32 native_safe_apic_wait_icr_idle(void);
 extern void native_apic_icr_write(u32 low, u32 id);
 extern u64 native_apic_icr_read(void);

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 4ee95cb2178e72a9988cca02809ec22be41b9b54..ab26a616f710c40f622e5e13cb73fde2800ee2b3 100644 (file)
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -240,12 +240,6 @@ static void __init apic_disable(void)
        apic = &apic_noop;
 }
 
-void native_apic_wait_icr_idle(void)
-{
-       while (apic_read(APIC_ICR) & APIC_ICR_BUSY)
-               cpu_relax();
-}
-
 u32 native_safe_apic_wait_icr_idle(void)
 {
        u32 send_status;

diff --git a/arch/x86/kernel/apic/apic_flat_64.c b/arch/x86/kernel/apic/apic_flat_64.c
index a0c875d6ef3e08fe85a59e946f5761ee819ee93f..57d3afb65e95fdca08d3f2e159305f9db7a96671 100644 (file)
--- a/arch/x86/kernel/apic/apic_flat_64.c
+++ b/arch/x86/kernel/apic/apic_flat_64.c
@@ -111,7 +111,7 @@ static struct apic apic_flat __ro_after_init = {
        .eoi_write                      = native_apic_mem_write,
        .icr_read                       = native_apic_icr_read,
        .icr_write                      = native_apic_icr_write,
-       .wait_icr_idle                  = native_apic_wait_icr_idle,
+       .wait_icr_idle                  = apic_mem_wait_icr_idle,
        .safe_wait_icr_idle             = native_safe_apic_wait_icr_idle,
 };
 
@@ -187,7 +187,7 @@ static struct apic apic_physflat __ro_after_init = {
        .eoi_write                      = native_apic_mem_write,
        .icr_read                       = native_apic_icr_read,
        .icr_write                      = native_apic_icr_write,
-       .wait_icr_idle                  = native_apic_wait_icr_idle,
+       .wait_icr_idle                  = apic_mem_wait_icr_idle,
        .safe_wait_icr_idle             = native_safe_apic_wait_icr_idle,
 };
 

diff --git a/arch/x86/kernel/apic/bigsmp_32.c b/arch/x86/kernel/apic/bigsmp_32.c
index ffff294f4b44faa337483577f28e00438a8d77ff..57077fc2f8a5eabb8a9f279bc0c9bf7ba1bb3647 100644 (file)
--- a/arch/x86/kernel/apic/bigsmp_32.c
+++ b/arch/x86/kernel/apic/bigsmp_32.c
@@ -108,7 +108,7 @@ static struct apic apic_bigsmp __ro_after_init = {
        .eoi_write                      = native_apic_mem_write,
        .icr_read                       = native_apic_icr_read,
        .icr_write                      = native_apic_icr_write,
-       .wait_icr_idle                  = native_apic_wait_icr_idle,
+       .wait_icr_idle                  = apic_mem_wait_icr_idle,
        .safe_wait_icr_idle             = native_safe_apic_wait_icr_idle,
 };
 

diff --git a/arch/x86/kernel/apic/ipi.c b/arch/x86/kernel/apic/ipi.c
index 614ac557f5e4e2c90d3f8a63a1bbc9b2c8db94f7..e0e05673a4f445a800fc17527c2cf4411706f0ba 100644 (file)
--- a/arch/x86/kernel/apic/ipi.c
+++ b/arch/x86/kernel/apic/ipi.c
@@ -102,7 +102,7 @@ static inline int __prepare_ICR2(unsigned int mask)
        return SET_XAPIC_DEST_FIELD(mask);
 }
 
-static inline void __xapic_wait_icr_idle(void)
+void apic_mem_wait_icr_idle(void)
 {
        while (native_apic_mem_read(APIC_ICR) & APIC_ICR_BUSY)
                cpu_relax();
@@ -137,7 +137,7 @@ static void __default_send_IPI_shortcut(unsigned int shortcut, int vector)
        if (unlikely(vector == NMI_VECTOR))
                safe_apic_wait_icr_idle();
        else
-               __xapic_wait_icr_idle();
+               apic_mem_wait_icr_idle();
 
        /* Destination field (ICR2) and the destination mode are ignored */
        native_apic_mem_write(APIC_ICR, __prepare_ICR(shortcut, vector, 0));
@@ -154,7 +154,7 @@ void __default_send_IPI_dest_field(unsigned int dest_mask, int vector,
        if (unlikely(vector == NMI_VECTOR))
                safe_apic_wait_icr_idle();
        else
-               __xapic_wait_icr_idle();
+               apic_mem_wait_icr_idle();
 
        /* Set the IPI destination field in the ICR */
        native_apic_mem_write(APIC_ICR2, __prepare_ICR2(dest_mask));

diff --git a/arch/x86/kernel/apic/local.h b/arch/x86/kernel/apic/local.h
index 5b0a0e78ba6ce97475dbb7c6cdca8b0b65ee5fda..2eb49d434564d33a0b6c2c3df15231b8512e96c5 100644 (file)
--- a/arch/x86/kernel/apic/local.h
+++ b/arch/x86/kernel/apic/local.h
@@ -44,6 +44,8 @@ static inline unsigned int __prepare_ICR(unsigned int shortcut, int vector,
 
 void default_init_apic_ldr(void);
 
+void apic_mem_wait_icr_idle(void);
+
 /*
  * This is used to send an IPI with no shorthand notation (the destination is
  * specified in bits 56 to 63 of the ICR).

diff --git a/arch/x86/kernel/apic/probe_32.c b/arch/x86/kernel/apic/probe_32.c
index 81c69d766a3048cdf0fc8c9c9618cfa5e9bbcfa5..52f3c6f2c6e28d3f16363ff1bc9274efe30c88a3 100644 (file)
--- a/arch/x86/kernel/apic/probe_32.c
+++ b/arch/x86/kernel/apic/probe_32.c
@@ -64,7 +64,7 @@ static struct apic apic_default __ro_after_init = {
        .eoi_write                      = native_apic_mem_write,
        .icr_read                       = native_apic_icr_read,
        .icr_write                      = native_apic_icr_write,
-       .wait_icr_idle                  = native_apic_wait_icr_idle,
+       .wait_icr_idle                  = apic_mem_wait_icr_idle,
        .safe_wait_icr_idle             = native_safe_apic_wait_icr_idle,
 };