phy: qcom-qmp: Add SW reset register
authorVinod Koul <vkoul@kernel.org>
Mon, 23 Dec 2019 14:30:46 +0000 (20:00 +0530)
committerKishon Vijay Abraham I <kishon@ti.com>
Wed, 8 Jan 2020 07:28:06 +0000 (12:58 +0530)
For V4 QMP UFS Phy, we need to assert reset bits, configure the phy and
then deassert it, so add the QPHY_SW_RESET register which does this.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Manu Gautam <mgautam@codeaurora.org>
Reviewed-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
drivers/phy/qualcomm/phy-qcom-qmp.c

index dee5616253f555147cb9573279795e3f800d40a1..45c9de4a6f55a17653a21f260b65f9e6a9f27b64 100644 (file)
@@ -168,6 +168,7 @@ static const unsigned int sdm845_ufsphy_regs_layout[] = {
 static const unsigned int sm8150_ufsphy_regs_layout[] = {
        [QPHY_START_CTRL]               = QPHY_V4_PHY_START,
        [QPHY_PCS_READY_STATUS]         = QPHY_V4_PCS_READY_STATUS,
+       [QPHY_SW_RESET]                 = QPHY_V4_SW_RESET,
 };
 
 static const struct qmp_phy_init_tbl msm8996_pcie_serdes_tbl[] = {