drm/amd/display: Extend AUX timeout for DP initial reads

[WHY]
DP LL Compliance tests require that the first DPCD transactions after a
hotplug have a timeout interval of 3.2 ms.  In cases where LTTPR is
disabled, this means that the first reads from DP_SET_POWER and DP_DPCD_REV must have an extended
timeout.

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 1b28b4a40f62a479c9fcc39fd8bb0245bee7b901..5ecbe525b6764eae07b66b55b06c76a4b4602919 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -3750,9 +3750,6 @@ static bool retrieve_link_cap(struct dc_link *link)
                        LINK_AUX_DEFAULT_LTTPR_TIMEOUT_PERIOD);
 
        is_lttpr_present = dp_retrieve_lttpr_cap(link);
-       if (!is_lttpr_present)
-               dc_link_aux_try_to_configure_timeout(link->ddc, LINK_AUX_DEFAULT_TIMEOUT_PERIOD);
-
 
        status = core_link_read_dpcd(link, DP_SET_POWER,
                        &dpcd_power_state, sizeof(dpcd_power_state));
@@ -3781,12 +3778,14 @@ static bool retrieve_link_cap(struct dc_link *link)
                        break;
        }
 
-
        if (status != DC_OK) {
                dm_error("%s: Read receiver caps dpcd data failed.\n", __func__);
                return false;
        }
 
+       if (!is_lttpr_present)
+               dc_link_aux_try_to_configure_timeout(link->ddc, LINK_AUX_DEFAULT_TIMEOUT_PERIOD);
+
        {
                union training_aux_rd_interval aux_rd_interval;