clk: qcom: Use qcom_branch_set_clk_en()

Instead of magically poking at the bit0 of branch clocks' CBCR, use
the newly introduced helper.

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240212-topic-clk_branch_en-v7-2-5b79eb7278b2@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/drivers/clk/qcom/camcc-sc8280xp.c b/drivers/clk/qcom/camcc-sc8280xp.c
index 3dcd79b01515170d5bb1945d02356fee6a036710..84f9caf3ddbf3745b687d6fed6bd7946bbcc1334 100644 (file)
--- a/drivers/clk/qcom/camcc-sc8280xp.c
+++ b/drivers/clk/qcom/camcc-sc8280xp.c
@@ -3010,10 +3010,8 @@ static int camcc_sc8280xp_probe(struct platform_device *pdev)
        clk_lucid_pll_configure(&camcc_pll6, regmap, &camcc_pll6_config);
        clk_lucid_pll_configure(&camcc_pll7, regmap, &camcc_pll7_config);
 
-       /*
-        * Keep camcc_gdsc_clk always enabled:
-        */
-       regmap_update_bits(regmap, 0xc1e4, BIT(0), 1);
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0xc1e4); /* CAMCC_GDSC_CLK */
 
        ret = qcom_cc_really_probe(pdev, &camcc_sc8280xp_desc, regmap);
        if (ret)

diff --git a/drivers/clk/qcom/camcc-sm8550.c b/drivers/clk/qcom/camcc-sm8550.c
index dd51ba4ea757be676b4f7b6a68c0b4981ba7a99f..1ef59a96f664f6919fef313d4cb5ec25326f03b4 100644 (file)
--- a/drivers/clk/qcom/camcc-sm8550.c
+++ b/drivers/clk/qcom/camcc-sm8550.c
@@ -3536,13 +3536,9 @@ static int cam_cc_sm8550_probe(struct platform_device *pdev)
        clk_lucid_ole_pll_configure(&cam_cc_pll11, regmap, &cam_cc_pll11_config);
        clk_lucid_ole_pll_configure(&cam_cc_pll12, regmap, &cam_cc_pll12_config);
 
-       /*
-        * Keep clocks always enabled:
-        *      cam_cc_gdsc_clk
-        *      cam_cc_sleep_clk
-        */
-       regmap_update_bits(regmap, 0x1419c, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x142cc, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x1419c); /* CAM_CC_GDSC_CLK */
+       qcom_branch_set_clk_en(regmap, 0x142cc); /* CAM_CC_SLEEP_CLK */
 
        ret = qcom_cc_really_probe(pdev, &cam_cc_sm8550_desc, regmap);
 

diff --git a/drivers/clk/qcom/camcc-x1e80100.c b/drivers/clk/qcom/camcc-x1e80100.c
index 01b3476fc26d15bb6a801fd46f7987f3a846c505..f7f3d92c263d4d5023b6cb6ae9d2df0a2ee0a875 100644 (file)
--- a/drivers/clk/qcom/camcc-x1e80100.c
+++ b/drivers/clk/qcom/camcc-x1e80100.c
@@ -2462,8 +2462,8 @@ static int cam_cc_x1e80100_probe(struct platform_device *pdev)
        clk_lucid_ole_pll_configure(&cam_cc_pll8, regmap, &cam_cc_pll8_config);
 
        /* Keep clocks always enabled */
-       regmap_update_bits(regmap, 0x13a9c, BIT(0), BIT(0)); /* cam_cc_gdsc_clk */
-       regmap_update_bits(regmap, 0x13ab8, BIT(0), BIT(0)); /* cam_cc_sleep_clk */
+       qcom_branch_set_clk_en(regmap, 0x13a9c); /* CAM_CC_GDSC_CLK */
+       qcom_branch_set_clk_en(regmap, 0x13ab8); /* CAM_CC_SLEEP_CLK */
 
        ret = qcom_cc_really_probe(pdev, &cam_cc_x1e80100_desc, regmap);
 

diff --git a/drivers/clk/qcom/dispcc-qcm2290.c b/drivers/clk/qcom/dispcc-qcm2290.c
index f3ac886d02262663206a264aef98c13da9a409af..654a10d53e5c5b58c6c12d0ffade1ad4ffba98a4 100644 (file)
--- a/drivers/clk/qcom/dispcc-qcm2290.c
+++ b/drivers/clk/qcom/dispcc-qcm2290.c
@@ -519,8 +519,8 @@ static int disp_cc_qcm2290_probe(struct platform_device *pdev)
 
        clk_alpha_pll_configure(&disp_cc_pll0, regmap, &disp_cc_pll0_config);
 
-       /* Keep DISP_CC_XO_CLK always-ON */
-       regmap_update_bits(regmap, 0x604c, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x604c); /* DISP_CC_XO_CLK */
 
        ret = qcom_cc_really_probe(pdev, &disp_cc_qcm2290_desc, regmap);
        if (ret) {

diff --git a/drivers/clk/qcom/dispcc-sc7280.c b/drivers/clk/qcom/dispcc-sc7280.c
index 95d56f49a1de510eafc0867cd9335d33e2fce152..fbeb8fccb99af6e5bdaae61e4037d9a58b232d98 100644 (file)
--- a/drivers/clk/qcom/dispcc-sc7280.c
+++ b/drivers/clk/qcom/dispcc-sc7280.c
@@ -878,11 +878,8 @@ static int disp_cc_sc7280_probe(struct platform_device *pdev)
 
        clk_lucid_pll_configure(&disp_cc_pll0, regmap, &disp_cc_pll0_config);
 
-       /*
-        * Keep the clocks always-ON
-        * DISP_CC_XO_CLK
-        */
-       regmap_update_bits(regmap, 0x5008, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x5008); /* DISP_CC_XO_CLK */
 
        return qcom_cc_really_probe(pdev, &disp_cc_sc7280_desc, regmap);
 }

diff --git a/drivers/clk/qcom/dispcc-sc8280xp.c b/drivers/clk/qcom/dispcc-sc8280xp.c
index 3ebf02d459f4353c5d8d2b6e620f4936278ec22c..91172f5b2f15b1d8a7b582ac582abd57b7b83c4e 100644 (file)
--- a/drivers/clk/qcom/dispcc-sc8280xp.c
+++ b/drivers/clk/qcom/dispcc-sc8280xp.c
@@ -3178,8 +3178,8 @@ static int disp_cc_sc8280xp_probe(struct platform_device *pdev)
                goto out_pm_runtime_put;
        }
 
-       /* DISP_CC_XO_CLK always-on */
-       regmap_update_bits(regmap, 0x605c, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x605c); /* DISP_CC_XO_CLK */
 
 out_pm_runtime_put:
        pm_runtime_put_sync(&pdev->dev);

diff --git a/drivers/clk/qcom/dispcc-sm6115.c b/drivers/clk/qcom/dispcc-sm6115.c
index 1fab43f08e737f55738f5535f2031ca36e78c626..bd07f26af35a2bf24900bbfae2967fa708b57c5c 100644 (file)
--- a/drivers/clk/qcom/dispcc-sm6115.c
+++ b/drivers/clk/qcom/dispcc-sm6115.c
@@ -583,8 +583,8 @@ static int disp_cc_sm6115_probe(struct platform_device *pdev)
 
        clk_alpha_pll_configure(&disp_cc_pll0, regmap, &disp_cc_pll0_config);
 
-       /* Keep DISP_CC_XO_CLK always-ON */
-       regmap_update_bits(regmap, 0x604c, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x604c); /* DISP_CC_XO_CLK */
 
        ret = qcom_cc_really_probe(pdev, &disp_cc_sm6115_desc, regmap);
        if (ret) {

diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c
index c139c1e481ef7738d5e66caddebb96e98d6dea84..43307c8a342caeac08a1523a36feb67b3845c88c 100644 (file)
--- a/drivers/clk/qcom/dispcc-sm8250.c
+++ b/drivers/clk/qcom/dispcc-sm8250.c
@@ -1363,8 +1363,8 @@ static int disp_cc_sm8250_probe(struct platform_device *pdev)
        /* Enable clock gating for MDP clocks */
        regmap_update_bits(regmap, 0x8000, 0x10, 0x10);
 
-       /* DISP_CC_XO_CLK always-on */
-       regmap_update_bits(regmap, 0x605c, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x605c); /* DISP_CC_XO_CLK */
 
        ret = qcom_cc_really_probe(pdev, &disp_cc_sm8250_desc, regmap);
 

diff --git a/drivers/clk/qcom/dispcc-sm8450.c b/drivers/clk/qcom/dispcc-sm8450.c
index 2afa2c9d3c9751f3229906e422c3e51564e4fcfb..92e9c4e7b13dcc95932b4c16ca6561910edb4d4c 100644 (file)
--- a/drivers/clk/qcom/dispcc-sm8450.c
+++ b/drivers/clk/qcom/dispcc-sm8450.c
@@ -1787,11 +1787,8 @@ static int disp_cc_sm8450_probe(struct platform_device *pdev)
        /* Enable clock gating for MDP clocks */
        regmap_update_bits(regmap, DISP_CC_MISC_CMD, 0x10, 0x10);
 
-       /*
-        * Keep clocks always enabled:
-        *      disp_cc_xo_clk
-        */
-       regmap_update_bits(regmap, 0xe05c, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0xe05c); /* DISP_CC_XO_CLK */
 
        ret = qcom_cc_really_probe(pdev, &disp_cc_sm8450_desc, regmap);
        if (ret)

diff --git a/drivers/clk/qcom/dispcc-sm8550.c b/drivers/clk/qcom/dispcc-sm8550.c
index 3a97f7897932c82f3a063f735ed3683f5b841352..3672c73ac11c692f8c133dabc4cd978bd6fafbae 100644 (file)
--- a/drivers/clk/qcom/dispcc-sm8550.c
+++ b/drivers/clk/qcom/dispcc-sm8550.c
@@ -1780,11 +1780,8 @@ static int disp_cc_sm8550_probe(struct platform_device *pdev)
        /* Enable clock gating for MDP clocks */
        regmap_update_bits(regmap, DISP_CC_MISC_CMD, 0x10, 0x10);
 
-       /*
-        * Keep clocks always enabled:
-        *      disp_cc_xo_clk
-        */
-       regmap_update_bits(regmap, 0xe054, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0xe054); /* DISP_CC_XO_CLK */
 
        ret = qcom_cc_really_probe(pdev, &disp_cc_sm8550_desc, regmap);
        if (ret)

diff --git a/drivers/clk/qcom/dispcc-sm8650.c b/drivers/clk/qcom/dispcc-sm8650.c
index 4458315308715ae5830cf3e2680668a3511d901c..9539db0d91145c4a101263d1a2d4f84a877055ca 100644 (file)
--- a/drivers/clk/qcom/dispcc-sm8650.c
+++ b/drivers/clk/qcom/dispcc-sm8650.c
@@ -1777,8 +1777,8 @@ static int disp_cc_sm8650_probe(struct platform_device *pdev)
        /* Enable clock gating for MDP clocks */
        regmap_update_bits(regmap, DISP_CC_MISC_CMD, 0x10, 0x10);
 
-       /* Keep clocks always enabled */
-       regmap_update_bits(regmap, 0xe054, BIT(0), BIT(0)); /* disp_cc_xo_clk */
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0xe054); /* DISP_CC_XO_CLK */
 
        ret = qcom_cc_really_probe(pdev, &disp_cc_sm8650_desc, regmap);
        if (ret)

diff --git a/drivers/clk/qcom/dispcc-x1e80100.c b/drivers/clk/qcom/dispcc-x1e80100.c
index eeefc30b1c8b415df34a7868757cfc8ccdcc5571..0b2ee6456762d3aeb22547d464a5a5878ab5062b 100644 (file)
--- a/drivers/clk/qcom/dispcc-x1e80100.c
+++ b/drivers/clk/qcom/dispcc-x1e80100.c
@@ -1677,8 +1677,8 @@ static int disp_cc_x1e80100_probe(struct platform_device *pdev)
        regmap_update_bits(regmap, DISP_CC_MISC_CMD, 0x10, 0x10);
 
        /* Keep clocks always enabled */
-       regmap_update_bits(regmap, 0xe074, BIT(0), BIT(0)); /* disp_cc_sleep_clk */
-       regmap_update_bits(regmap, 0xe054, BIT(0), BIT(0)); /* disp_cc_xo_clk */
+       qcom_branch_set_clk_en(regmap, 0xe074); /* DISP_CC_SLEEP_CLK */
+       qcom_branch_set_clk_en(regmap, 0xe054); /* DISP_CC_XO_CLK */
 
        ret = qcom_cc_really_probe(pdev, &disp_cc_x1e80100_desc, regmap);
        if (ret)

diff --git a/drivers/clk/qcom/gcc-sa8775p.c b/drivers/clk/qcom/gcc-sa8775p.c
index c2b403cb63010fdd24797b64da7a07e0397eb459..5bcbfbf52cb9e5691ac4106ab6b7173c3037a6f0 100644 (file)
--- a/drivers/clk/qcom/gcc-sa8775p.c
+++ b/drivers/clk/qcom/gcc-sa8775p.c
@@ -4742,21 +4742,16 @@ static int gcc_sa8775p_probe(struct platform_device *pdev)
        if (ret)
                return ret;
 
-       /*
-        * Keep the clocks always-ON
-        * GCC_CAMERA_AHB_CLK, GCC_CAMERA_XO_CLK, GCC_DISP1_AHB_CLK,
-        * GCC_DISP1_XO_CLK, GCC_DISP_AHB_CLK, GCC_DISP_XO_CLK,
-        * GCC_GPU_CFG_AHB_CLK, GCC_VIDEO_AHB_CLK, GCC_VIDEO_XO_CLK.
-        */
-       regmap_update_bits(regmap, 0x32004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x32020, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0xc7004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0xc7018, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x33004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x33018, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x7d004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x34004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x34024, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x32004); /* GCC_CAMERA_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x32020); /* GCC_CAMERA_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0xc7004); /* GCC_DISP1_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0xc7018); /* GCC_DISP1_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x33004); /* GCC_DISP_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x33018); /* GCC_DISP_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x7d004); /* GCC_GPU_CFG_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x34004); /* GCC_VIDEO_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x34024); /* GCC_VIDEO_XO_CLK */
 
        return qcom_cc_really_probe(pdev, &gcc_sa8775p_desc, regmap);
 }

diff --git a/drivers/clk/qcom/gcc-sc7180.c b/drivers/clk/qcom/gcc-sc7180.c
index a3406aadbd17076d85f2558af0f1bf6bf3cd4acc..6a5f785c0ced0084f95a5d1ba2becf8e17e2a89e 100644 (file)
--- a/drivers/clk/qcom/gcc-sc7180.c
+++ b/drivers/clk/qcom/gcc-sc7180.c
@@ -2443,19 +2443,15 @@ static int gcc_sc7180_probe(struct platform_device *pdev)
        regmap_update_bits(regmap, 0x4d110, 0x3, 0x3);
        regmap_update_bits(regmap, 0x71028, 0x3, 0x3);
 
-       /*
-        * Keep the clocks always-ON
-        * GCC_CPUSS_GNOC_CLK, GCC_VIDEO_AHB_CLK, GCC_CAMERA_AHB_CLK,
-        * GCC_DISP_AHB_CLK, GCC_GPU_CFG_AHB_CLK
-        */
-       regmap_update_bits(regmap, 0x48004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x0b004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x0b008, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x0b00c, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x0b02c, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x0b028, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x0b030, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x48004); /* GCC_CPUSS_GNOC_CLK */
+       qcom_branch_set_clk_en(regmap, 0x0b004); /* GCC_VIDEO_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x0b008); /* GCC_CAMERA_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x0b00c); /* GCC_DISP_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x0b02c); /* GCC_CAMERA_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x0b028); /* GCC_VIDEO_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x0b030); /* GCC_DISP_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x71004); /* GCC_GPU_CFG_AHB_CLK */
 
        ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks,
                                        ARRAY_SIZE(gcc_dfs_clocks));

diff --git a/drivers/clk/qcom/gcc-sc7280.c b/drivers/clk/qcom/gcc-sc7280.c
index 2b661df5de2660bf554656fb573477a86ede8ad5..f45a8318900c5ff8e96ec0fed67e13a396b5df79 100644 (file)
--- a/drivers/clk/qcom/gcc-sc7280.c
+++ b/drivers/clk/qcom/gcc-sc7280.c
@@ -3453,18 +3453,14 @@ static int gcc_sc7280_probe(struct platform_device *pdev)
        if (IS_ERR(regmap))
                return PTR_ERR(regmap);
 
-       /*
-        * Keep the clocks always-ON
-        * GCC_CAMERA_AHB_CLK/XO_CLK, GCC_DISP_AHB_CLK/XO_CLK
-        * GCC_VIDEO_AHB_CLK/XO_CLK, GCC_GPU_CFG_AHB_CLK
-        */
-       regmap_update_bits(regmap, 0x26004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x26028, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x27004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x2701C, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x28004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x28014, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x26004);/* GCC_CAMERA_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x26028);/* GCC_CAMERA_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x27004);/* GCC_DISP_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x2701c);/* GCC_DISP_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x28004);/* GCC_VIDEO_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x28014);/* GCC_VIDEO_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x71004);/* GCC_GPU_CFG_AHB_CLK */
        regmap_update_bits(regmap, 0x7100C, BIT(13), BIT(13));
 
        ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks,

diff --git a/drivers/clk/qcom/gcc-sc8180x.c b/drivers/clk/qcom/gcc-sc8180x.c
index c72e3dbc6f88aa4dbffccc760d7718b683cebc0a..5261bfc92b3dc3d6c5c2b09d7b7e6a4b6d500d50 100644 (file)
--- a/drivers/clk/qcom/gcc-sc8180x.c
+++ b/drivers/clk/qcom/gcc-sc8180x.c
@@ -4607,23 +4607,17 @@ static int gcc_sc8180x_probe(struct platform_device *pdev)
        if (IS_ERR(regmap))
                return PTR_ERR(regmap);
 
-       /*
-        * Enable the following always-on clocks:
-        * GCC_VIDEO_AHB_CLK, GCC_CAMERA_AHB_CLK, GCC_DISP_AHB_CLK,
-        * GCC_VIDEO_XO_CLK, GCC_CAMERA_XO_CLK, GCC_DISP_XO_CLK,
-        * GCC_CPUSS_GNOC_CLK, GCC_CPUSS_DVM_BUS_CLK, GCC_NPU_CFG_AHB_CLK and
-        * GCC_GPU_CFG_AHB_CLK
-        */
-       regmap_update_bits(regmap, 0xb004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0xb008, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0xb00c, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0xb040, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0xb044, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0xb048, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x48004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x48190, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x4d004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0xb004); /* GCC_VIDEO_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0xb008); /* GCC_CAMERA_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0xb00c); /* GCC_DISP_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0xb040); /* GCC_VIDEO_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0xb044); /* GCC_CAMERA_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0xb048); /* GCC_DISP_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x48004); /* GCC_CPUSS_GNOC_CLK */
+       qcom_branch_set_clk_en(regmap, 0x48190); /* GCC_CPUSS_DVM_BUS_CLK */
+       qcom_branch_set_clk_en(regmap, 0x4d004); /* GCC_NPU_CFG_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x71004); /* GCC_GPU_CFG_AHB_CLK */
 
        /* Disable the GPLL0 active input to NPU and GPU via MISC registers */
        regmap_update_bits(regmap, 0x4d110, 0x3, 0x3);

diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c
index 9f4db815688c4391ad33c5687c6c960ae80fa825..082d7b5504ebba373e79030b57ca477064f283ac 100644 (file)
--- a/drivers/clk/qcom/gcc-sc8280xp.c
+++ b/drivers/clk/qcom/gcc-sc8280xp.c
@@ -7543,21 +7543,16 @@ static int gcc_sc8280xp_probe(struct platform_device *pdev)
                goto err_put_rpm;
        }
 
-       /*
-        * Keep the clocks always-ON
-        * GCC_CAMERA_AHB_CLK, GCC_CAMERA_XO_CLK, GCC_DISP_AHB_CLK,
-        * GCC_DISP_XO_CLK, GCC_GPU_CFG_AHB_CLK, GCC_VIDEO_AHB_CLK,
-        * GCC_VIDEO_XO_CLK, GCC_DISP1_AHB_CLK, GCC_DISP1_XO_CLK
-        */
-       regmap_update_bits(regmap, 0x26004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x26020, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x27004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x27028, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x28004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x28028, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0xbb004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0xbb028, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x26004); /* GCC_CAMERA_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x26020); /* GCC_CAMERA_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x27004); /* GCC_DISP_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x27028); /* GCC_DISP_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x71004); /* GCC_GPU_CFG_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x28004); /* GCC_VIDEO_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x28028); /* GCC_VIDEO_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0xbb004); /* GCC_DISP1_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0xbb028); /* GCC_DISP1_XO_CLK */
 
        ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks, ARRAY_SIZE(gcc_dfs_clocks));
        if (ret)

diff --git a/drivers/clk/qcom/gcc-sdx55.c b/drivers/clk/qcom/gcc-sdx55.c
index d5e17122698cda6b46e7760fd64dfc9538aeabc4..26279b8d321a3091caa8f93cea00fb86e08a8ee9 100644 (file)
--- a/drivers/clk/qcom/gcc-sdx55.c
+++ b/drivers/clk/qcom/gcc-sdx55.c
@@ -1611,14 +1611,10 @@ static int gcc_sdx55_probe(struct platform_device *pdev)
        if (IS_ERR(regmap))
                return PTR_ERR(regmap);
 
-       /*
-        * Keep the clocks always-ON as they are critical to the functioning
-        * of the system:
-        * GCC_SYS_NOC_CPUSS_AHB_CLK, GCC_CPUSS_AHB_CLK, GCC_CPUSS_GNOC_CLK
-        */
-       regmap_update_bits(regmap, 0x6d008, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x6d008, BIT(21), BIT(21));
-       regmap_update_bits(regmap, 0x6d008, BIT(22), BIT(22));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x6d008); /* GCC_SYS_NOC_CPUSS_AHB_CLK */
+       regmap_update_bits(regmap, 0x6d008, BIT(21), BIT(21)); /* GCC_CPUSS_AHB_CLK */
+       regmap_update_bits(regmap, 0x6d008, BIT(22), BIT(22)); /* GCC_CPUSS_GNOC_CLK */
 
        return qcom_cc_really_probe(pdev, &gcc_sdx55_desc, regmap);
 }

diff --git a/drivers/clk/qcom/gcc-sdx65.c b/drivers/clk/qcom/gcc-sdx65.c
index ffddbed5a6dba64e988a74d84f6cb31bba4e7d97..8fde6463574b92a5cef5169061205d85f2da75c4 100644 (file)
--- a/drivers/clk/qcom/gcc-sdx65.c
+++ b/drivers/clk/qcom/gcc-sdx65.c
@@ -1574,14 +1574,11 @@ static int gcc_sdx65_probe(struct platform_device *pdev)
        regmap = qcom_cc_map(pdev, &gcc_sdx65_desc);
        if (IS_ERR(regmap))
                return PTR_ERR(regmap);
-       /*
-        * Keep the clocks always-ON as they are critical to the functioning
-        * of the system:
-        * GCC_SYS_NOC_CPUSS_AHB_CLK, GCC_CPUSS_AHB_CLK, GCC_CPUSS_GNOC_CLK
-        */
-       regmap_update_bits(regmap, 0x6d008, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x6d008, BIT(21), BIT(21));
-       regmap_update_bits(regmap, 0x6d008, BIT(22), BIT(22));
+
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x6d008); /* GCC_SYS_NOC_CPUSS_AHB_CLK */
+       regmap_update_bits(regmap, 0x6d008, BIT(21), BIT(21)); /* GCC_CPUSS_AHB_CLK */
+       regmap_update_bits(regmap, 0x6d008, BIT(22), BIT(22)); /* GCC_CPUSS_GNOC_CLK */
 
        return qcom_cc_really_probe(pdev, &gcc_sdx65_desc, regmap);
 }

diff --git a/drivers/clk/qcom/gcc-sdx75.c b/drivers/clk/qcom/gcc-sdx75.c
index 573af17bd24caa3b7f4520a22687e15a8a0e25da..c51338f08ef16f29afddb91b84787d377cf1c2b8 100644 (file)
--- a/drivers/clk/qcom/gcc-sdx75.c
+++ b/drivers/clk/qcom/gcc-sdx75.c
@@ -2936,13 +2936,9 @@ static int gcc_sdx75_probe(struct platform_device *pdev)
        if (ret)
                return ret;
 
-       /*
-        * Keep clocks always enabled:
-        * gcc_ahb_pcie_link_clk
-        * gcc_xo_pcie_link_clk
-        */
-       regmap_update_bits(regmap, 0x3e004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x3e008, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x3e004); /* GCC_AHB_PCIE_LINK_CLK */
+       qcom_branch_set_clk_en(regmap, 0x3e008); /* GCC_XO_PCIE_LINK_CLK */
 
        return qcom_cc_really_probe(pdev, &gcc_sdx75_desc, regmap);
 }

diff --git a/drivers/clk/qcom/gcc-sm4450.c b/drivers/clk/qcom/gcc-sm4450.c
index ab8fb77d15a2082700fa64162ac43ac6c0ccac04..062e55e981569bafb00dfefc2b50cc93a010c30c 100644 (file)
--- a/drivers/clk/qcom/gcc-sm4450.c
+++ b/drivers/clk/qcom/gcc-sm4450.c
@@ -2849,25 +2849,15 @@ static int gcc_sm4450_probe(struct platform_device *pdev)
 
        qcom_branch_set_force_mem_core(regmap, gcc_ufs_phy_ice_core_clk, true);
 
-       /*
-        * Keep clocks always enabled:
-        * gcc_camera_ahb_clk
-        * gcc_camera_sleep_clk
-        * gcc_camera_xo_clk
-        * gcc_disp_ahb_clk
-        * gcc_disp_xo_clk
-        * gcc_gpu_cfg_ahb_clk
-        * gcc_video_ahb_clk
-        * gcc_video_xo_clk
-        */
-       regmap_update_bits(regmap, 0x36004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x36018, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x3601c, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x37004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x37014, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x81004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x42004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x42018, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x36004); /* GCC_CAMERA_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x36018); /* GCC_CAMERA_SLEEP_CLK */
+       qcom_branch_set_clk_en(regmap, 0x3601c); /* GCC_CAMERA_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x37004); /* GCC_DISP_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x37014); /* GCC_DISP_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x81004); /* GCC_GPU_CFG_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x42004); /* GCC_VIDEO_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x42018); /* GCC_VIDEO_XO_CLK */
 
        regmap_update_bits(regmap, 0x4201c, BIT(21), BIT(21));
 

diff --git a/drivers/clk/qcom/gcc-sm6375.c b/drivers/clk/qcom/gcc-sm6375.c
index 3dd15d765b22e1efc2feb8be8acca56d91927f75..84639d5b89bfb7e2a672aac5fb7aff70ac609882 100644 (file)
--- a/drivers/clk/qcom/gcc-sm6375.c
+++ b/drivers/clk/qcom/gcc-sm6375.c
@@ -3882,13 +3882,10 @@ static int gcc_sm6375_probe(struct platform_device *pdev)
        if (ret)
                return ret;
 
-       /*
-        * Keep the following clocks always on:
-        * GCC_CAMERA_XO_CLK, GCC_CPUSS_GNOC_CLK, GCC_DISP_XO_CLK
-        */
-       regmap_update_bits(regmap, 0x17028, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x2b004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x1702c, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x17028); /* GCC_CAMERA_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x2b004); /* GCC_CPUSS_GNOC_CLK */
+       qcom_branch_set_clk_en(regmap, 0x1702c); /* GCC_DISP_XO_CLK */
 
        clk_lucid_pll_configure(&gpll10, regmap, &gpll10_config);
        clk_lucid_pll_configure(&gpll11, regmap, &gpll11_config);

diff --git a/drivers/clk/qcom/gcc-sm7150.c b/drivers/clk/qcom/gcc-sm7150.c
index 7c5596331c30dd2ed16f9e89a73765a1717b4a47..44b49f7cd178351ac32a6eac94664e7361a67057 100644 (file)
--- a/drivers/clk/qcom/gcc-sm7150.c
+++ b/drivers/clk/qcom/gcc-sm7150.c
@@ -3002,20 +3002,15 @@ static int gcc_sm7150_probe(struct platform_device *pdev)
        regmap_update_bits(regmap, 0x4d110, 0x3, 0x3);
        regmap_update_bits(regmap, 0x71028, 0x3, 0x3);
 
-       /*
-        * Keep the critical clocks always-ON
-        * GCC_CPUSS_GNOC_CLK, GCC_VIDEO_AHB_CLK, GCC_CAMERA_AHB_CLK,
-        * GCC_DISP_AHB_CLK, GCC_CAMERA_XO_CLK, GCC_VIDEO_XO_CLK,
-        * GCC_DISP_XO_CLK, GCC_GPU_CFG_AHB_CLK
-        */
-       regmap_update_bits(regmap, 0x48004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x0b004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x0b008, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x0b00c, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x0b02c, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x0b028, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x0b030, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x48004); /* GCC_CPUSS_GNOC_CLK */
+       qcom_branch_set_clk_en(regmap, 0x0b004); /* GCC_VIDEO_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x0b008); /* GCC_CAMERA_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x0b00c); /* GCC_DISP_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x0b02c); /* GCC_CAMERA_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x0b028); /* GCC_VIDEO_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x0b030); /* GCC_DISP_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x71004); /* GCC_GPU_CFG_AHB_CLK */
 
        ret = qcom_cc_register_rcg_dfs(regmap, gcc_sm7150_dfs_desc,
                                        ARRAY_SIZE(gcc_sm7150_dfs_desc));

diff --git a/drivers/clk/qcom/gcc-sm8250.c b/drivers/clk/qcom/gcc-sm8250.c
index 61d01d4c379b0ff1e8dea693d650b8bcd23181d9..e630bfa2d0c17957f4188c0478a8dbe3d5bea27a 100644 (file)
--- a/drivers/clk/qcom/gcc-sm8250.c
+++ b/drivers/clk/qcom/gcc-sm8250.c
@@ -3643,18 +3643,13 @@ static int gcc_sm8250_probe(struct platform_device *pdev)
        regmap_update_bits(regmap, 0x4d110, 0x3, 0x3);
        regmap_update_bits(regmap, 0x71028, 0x3, 0x3);
 
-       /*
-        * Keep the clocks always-ON
-        * GCC_VIDEO_AHB_CLK, GCC_CAMERA_AHB_CLK, GCC_DISP_AHB_CLK,
-        * GCC_CPUSS_DVM_BUS_CLK, GCC_GPU_CFG_AHB_CLK,
-        * GCC_SYS_NOC_CPUSS_AHB_CLK
-        */
-       regmap_update_bits(regmap, 0x0b004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x0b008, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x0b00c, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x4818c, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x52000, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x0b004); /* GCC_VIDEO_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x0b008); /* GCC_CAMERA_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x0b00c); /* GCC_DISP_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x4818c); /* GCC_CPUSS_DVM_BUS_CLK */
+       qcom_branch_set_clk_en(regmap, 0x71004); /* GCC_GPU_CFG_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x52000); /* GCC_SYS_NOC_CPUSS_AHB_CLK */
 
        ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks,
                                       ARRAY_SIZE(gcc_dfs_clocks));

diff --git a/drivers/clk/qcom/gcc-sm8350.c b/drivers/clk/qcom/gcc-sm8350.c
index df4842588a24817dd2a297c29fe25ad2aa36ed7e..fc0402e8a2a75d6b0b7f9449341fb888568389e2 100644 (file)
--- a/drivers/clk/qcom/gcc-sm8350.c
+++ b/drivers/clk/qcom/gcc-sm8350.c
@@ -3806,18 +3806,14 @@ static int gcc_sm8350_probe(struct platform_device *pdev)
                return PTR_ERR(regmap);
        }
 
-       /*
-        * Keep the critical clock always-On
-        * GCC_CAMERA_AHB_CLK, GCC_CAMERA_XO_CLK, GCC_DISP_AHB_CLK, GCC_DISP_XO_CLK,
-        * GCC_GPU_CFG_AHB_CLK, GCC_VIDEO_AHB_CLK, GCC_VIDEO_XO_CLK
-        */
-       regmap_update_bits(regmap, 0x26004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x26018, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x27004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x2701c, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x28004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x28020, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x26004); /* GCC_CAMERA_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x26018); /* GCC_CAMERA_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x27004); /* GCC_DISP_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x2701c); /* GCC_DISP_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x71004); /* GCC_GPU_CFG_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x28004); /* GCC_VIDEO_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x28020); /* GCC_VIDEO_XO_CLK */
 
        ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks, ARRAY_SIZE(gcc_dfs_clocks));
        if (ret)

diff --git a/drivers/clk/qcom/gcc-sm8450.c b/drivers/clk/qcom/gcc-sm8450.c
index 1825b3456dd06ccccbe6d9e98c755ef3842692d8..e86c58bc5e48bc89aaa06cb07d6412b5d31d0f88 100644 (file)
--- a/drivers/clk/qcom/gcc-sm8450.c
+++ b/drivers/clk/qcom/gcc-sm8450.c
@@ -3280,19 +3280,14 @@ static int gcc_sm8450_probe(struct platform_device *pdev)
        /* FORCE_MEM_CORE_ON for ufs phy ice core clocks */
        regmap_update_bits(regmap, gcc_ufs_phy_ice_core_clk.halt_reg, BIT(14), BIT(14));
 
-       /*
-        * Keep the critical clock always-On
-        * gcc_camera_ahb_clk, gcc_camera_xo_clk, gcc_disp_ahb_clk,
-        * gcc_disp_xo_clk, gcc_gpu_cfg_ahb_clk, gcc_video_ahb_clk,
-        * gcc_video_xo_clk
-        */
-       regmap_update_bits(regmap, 0x36004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x36020, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x37004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x3701c, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x81004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x42004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x42028, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x36004); /* GCC_CAMERA_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x36020); /* GCC_CAMERA_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x37004); /* GCC_DISP_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x3701c); /* GCC_DISP_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x81004); /* GCC_GPU_CFG_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x42004); /* GCC_VIDEO_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x42028); /* GCC_VIDEO_XO_CLK */
 
        return qcom_cc_really_probe(pdev, &gcc_sm8450_desc, regmap);
 }

diff --git a/drivers/clk/qcom/gcc-sm8550.c b/drivers/clk/qcom/gcc-sm8550.c
index 4cbc728f5c724a96835631af4896b70fc4f79848..26d7349e7642483366f6cb8e5345cac0cb90a176 100644 (file)
--- a/drivers/clk/qcom/gcc-sm8550.c
+++ b/drivers/clk/qcom/gcc-sm8550.c
@@ -3352,19 +3352,14 @@ static int gcc_sm8550_probe(struct platform_device *pdev)
        /* FORCE_MEM_CORE_ON for ufs phy ice core clocks */
        regmap_update_bits(regmap, gcc_ufs_phy_ice_core_clk.halt_reg, BIT(14), BIT(14));
 
-       /*
-        * Keep the critical clock always-On
-        * gcc_camera_ahb_clk, gcc_camera_xo_clk, gcc_disp_ahb_clk,
-        * gcc_disp_xo_clk, gcc_gpu_cfg_ahb_clk, gcc_video_ahb_clk,
-        * gcc_video_xo_clk
-        */
-       regmap_update_bits(regmap, 0x26004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x26028, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x27004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x27018, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x32004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x32030, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x26004); /* GCC_CAMERA_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x26028); /* GCC_CAMERA_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x27004); /* GCC_DISP_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x27018); /* GCC_DISP_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x71004); /* GCC_GPU_CFG_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x32004); /* GCC_VIDEO_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x32030); /* GCC_VIDEO_XO_CLK */
 
        /* Clear GDSC_SLEEP_ENA_VOTE to stop votes being auto-removed in sleep. */
        regmap_write(regmap, 0x52024, 0x0);

diff --git a/drivers/clk/qcom/gcc-sm8650.c b/drivers/clk/qcom/gcc-sm8650.c
index 63becb03cd90f5c903fe590c5f92bffa5bd63e95..9d1cbdf860fb3b6d0a5ee308ebbb985029e1c779 100644 (file)
--- a/drivers/clk/qcom/gcc-sm8650.c
+++ b/drivers/clk/qcom/gcc-sm8650.c
@@ -3808,14 +3808,14 @@ static int gcc_sm8650_probe(struct platform_device *pdev)
        if (ret)
                return ret;
 
-       /* Keep the critical clock always-On */
-       regmap_update_bits(regmap, 0x26004, BIT(0), BIT(0)); /* gcc_camera_ahb_clk */
-       regmap_update_bits(regmap, 0x26028, BIT(0), BIT(0)); /* gcc_camera_xo_clk */
-       regmap_update_bits(regmap, 0x27004, BIT(0), BIT(0)); /* gcc_disp_ahb_clk */
-       regmap_update_bits(regmap, 0x27018, BIT(0), BIT(0)); /* gcc_disp_xo_clk */
-       regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0)); /* gcc_gpu_cfg_ahb_clk */
-       regmap_update_bits(regmap, 0x32004, BIT(0), BIT(0)); /* gcc_video_ahb_clk */
-       regmap_update_bits(regmap, 0x32030, BIT(0), BIT(0)); /* gcc_video_xo_clk */
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x26004); /* GCC_CAMERA_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x26028); /* GCC_CAMERA_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x27004); /* GCC_DISP_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x27018); /* GCC_DISP_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x71004); /* GCC_GPU_CFG_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x32004); /* GCC_VIDEO_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x32030); /* GCC_VIDEO_XO_CLK */
 
        qcom_branch_set_force_mem_core(regmap, gcc_ufs_phy_ice_core_clk, true);
 

diff --git a/drivers/clk/qcom/gcc-x1e80100.c b/drivers/clk/qcom/gcc-x1e80100.c
index d7182d6e978372ce467da5d0c7b4fd0613eb0d8b..1404017be9180aa78c534f912396018059eb8f53 100644 (file)
--- a/drivers/clk/qcom/gcc-x1e80100.c
+++ b/drivers/clk/qcom/gcc-x1e80100.c
@@ -6769,14 +6769,14 @@ static int gcc_x1e80100_probe(struct platform_device *pdev)
        if (ret)
                return ret;
 
-       /* Keep the critical clock always-On */
-       regmap_update_bits(regmap, 0x26004, BIT(0), BIT(0)); /* gcc_camera_ahb_clk */
-       regmap_update_bits(regmap, 0x26028, BIT(0), BIT(0)); /* gcc_camera_xo_clk */
-       regmap_update_bits(regmap, 0x27004, BIT(0), BIT(0)); /* gcc_disp_ahb_clk */
-       regmap_update_bits(regmap, 0x27018, BIT(0), BIT(0)); /* gcc_disp_xo_clk */
-       regmap_update_bits(regmap, 0x32004, BIT(0), BIT(0)); /* gcc_video_ahb_clk */
-       regmap_update_bits(regmap, 0x32030, BIT(0), BIT(0)); /* gcc_video_xo_clk */
-       regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0)); /* gcc_gpu_cfg_ahb_clk */
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x26004); /* GCC_CAMERA_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x26028); /* GCC_CAMERA_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x27004); /* GCC_DISP_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x27018); /* GCC_DISP_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x32004); /* GCC_VIDEO_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x32030); /* GCC_VIDEO_XO_CLK */
+       qcom_branch_set_clk_en(regmap, 0x71004); /* GCC_GPU_CFG_AHB_CLK */
 
        /* Clear GDSC_SLEEP_ENA_VOTE to stop votes being auto-removed in sleep. */
        regmap_write(regmap, 0x52224, 0x0);

diff --git a/drivers/clk/qcom/gpucc-sc7280.c b/drivers/clk/qcom/gpucc-sc7280.c
index 68a3e007df1f3a16c964bb11340d58172b80b923..35b394feb68da03b88a390ec40312a62c09e95cc 100644 (file)
--- a/drivers/clk/qcom/gpucc-sc7280.c
+++ b/drivers/clk/qcom/gpucc-sc7280.c
@@ -457,12 +457,9 @@ static int gpu_cc_sc7280_probe(struct platform_device *pdev)
 
        clk_lucid_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config);
 
-       /*
-        * Keep the clocks always-ON
-        * GPU_CC_CB_CLK, GPUCC_CX_GMU_CLK
-        */
-       regmap_update_bits(regmap, 0x1170, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x1098, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x1170); /* GPU_CC_CB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x1098); /* GPUCC_CX_GMU_CLK */
        regmap_update_bits(regmap, 0x1098, BIT(13), BIT(13));
 
        return qcom_cc_really_probe(pdev, &gpu_cc_sc7280_desc, regmap);

diff --git a/drivers/clk/qcom/gpucc-sc8280xp.c b/drivers/clk/qcom/gpucc-sc8280xp.c
index e2b3bc000c71e9d154f10534822892f510c195b4..3611d2d1823db00f6a60debe8883ea128f51320f 100644 (file)
--- a/drivers/clk/qcom/gpucc-sc8280xp.c
+++ b/drivers/clk/qcom/gpucc-sc8280xp.c
@@ -445,12 +445,9 @@ static int gpu_cc_sc8280xp_probe(struct platform_device *pdev)
        clk_lucid_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config);
        clk_lucid_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config);
 
-       /*
-        * Keep the clocks always-ON
-        * GPU_CC_CB_CLK, GPU_CC_CXO_CLK
-        */
-       regmap_update_bits(regmap, 0x1170, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x109c, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x1170); /* GPU_CC_CB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x109c); /* GPU_CC_CXO_CLK */
 
        ret = qcom_cc_really_probe(pdev, &gpu_cc_sc8280xp_desc, regmap);
        pm_runtime_put(&pdev->dev);

diff --git a/drivers/clk/qcom/gpucc-sm8550.c b/drivers/clk/qcom/gpucc-sm8550.c
index 836cefa8896d8668f51a3e8e1133e3a7a7a5c081..4fc69c6026e5e18cf7eb537faede4fb3b72d7acf 100644 (file)
--- a/drivers/clk/qcom/gpucc-sm8550.c
+++ b/drivers/clk/qcom/gpucc-sm8550.c
@@ -575,13 +575,9 @@ static int gpu_cc_sm8550_probe(struct platform_device *pdev)
        clk_lucid_ole_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config);
        clk_lucid_ole_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config);
 
-       /*
-        * Keep clocks always enabled:
-        *      gpu_cc_cxo_aon_clk
-        *      gpu_cc_demet_clk
-        */
-       regmap_update_bits(regmap, 0x9004, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x900c, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x9004); /* GPU_CC_CXO_AON_CLK */
+       qcom_branch_set_clk_en(regmap, 0x900c); /* GPU_CC_DEMET_CLK */
 
        return qcom_cc_really_probe(pdev, &gpu_cc_sm8550_desc, regmap);
 }

diff --git a/drivers/clk/qcom/gpucc-x1e80100.c b/drivers/clk/qcom/gpucc-x1e80100.c
index 3bfd37f10b9d91e28ebcf948fde972cdefbb736c..b7e79d118d6ef0c374c30034aba08a79dba8b33e 100644 (file)
--- a/drivers/clk/qcom/gpucc-x1e80100.c
+++ b/drivers/clk/qcom/gpucc-x1e80100.c
@@ -638,7 +638,7 @@ static int gpu_cc_x1e80100_probe(struct platform_device *pdev)
        clk_lucid_evo_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config);
 
        /* Keep clocks always enabled */
-       regmap_update_bits(regmap, 0x93a4, BIT(0), BIT(0)); /* gpu_cc_cb_clk */
+       qcom_branch_set_clk_en(regmap, 0x93a4); /* GPU_CC_CB_CLK */
 
        return qcom_cc_really_probe(pdev, &gpu_cc_x1e80100_desc, regmap);
 }

diff --git a/drivers/clk/qcom/lpasscorecc-sc7180.c b/drivers/clk/qcom/lpasscorecc-sc7180.c
index 9051fd567112521224c320febe18e9f7ba134fd3..fd9cd2e3f95651caa1f4573de0c5115738868344 100644 (file)
--- a/drivers/clk/qcom/lpasscorecc-sc7180.c
+++ b/drivers/clk/qcom/lpasscorecc-sc7180.c
@@ -401,11 +401,8 @@ static int lpass_core_cc_sc7180_probe(struct platform_device *pdev)
                goto exit;
        }
 
-       /*
-        * Keep the CLK always-ON
-        * LPASS_AUDIO_CORE_SYSNOC_SWAY_CORE_CLK
-        */
-       regmap_update_bits(regmap, 0x24000, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x24000); /* LPASS_AUDIO_CORE_SYSNOC_SWAY_CORE_CLK */
 
        /* PLL settings */
        regmap_write(regmap, 0x1008, 0x20);

diff --git a/drivers/clk/qcom/videocc-sm8250.c b/drivers/clk/qcom/videocc-sm8250.c
index c00692a5c15a7a1e8221520e419de8d704a1cb3e..016b596e03b300d84e7c3d69be459934c9756647 100644 (file)
--- a/drivers/clk/qcom/videocc-sm8250.c
+++ b/drivers/clk/qcom/videocc-sm8250.c
@@ -383,9 +383,9 @@ static int video_cc_sm8250_probe(struct platform_device *pdev)
        clk_lucid_pll_configure(&video_pll0, regmap, &video_pll0_config);
        clk_lucid_pll_configure(&video_pll1, regmap, &video_pll1_config);
 
-       /* Keep VIDEO_CC_AHB_CLK and VIDEO_CC_XO_CLK ALWAYS-ON */
-       regmap_update_bits(regmap, 0xe58, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0xeec, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0xe58); /* VIDEO_CC_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0xeec); /* VIDEO_CC_XO_CLK */
 
        ret = qcom_cc_really_probe(pdev, &video_cc_sm8250_desc, regmap);
 

diff --git a/drivers/clk/qcom/videocc-sm8350.c b/drivers/clk/qcom/videocc-sm8350.c
index 8db2bb9955585bdf74de041d645e3c9dcfefabea..f7aec28d4c872e5380580e23857aadd82ee95350 100644 (file)
--- a/drivers/clk/qcom/videocc-sm8350.c
+++ b/drivers/clk/qcom/videocc-sm8350.c
@@ -558,13 +558,9 @@ static int video_cc_sm8350_probe(struct platform_device *pdev)
        clk_lucid_pll_configure(&video_pll0, regmap, &video_pll0_config);
        clk_lucid_pll_configure(&video_pll1, regmap, &video_pll1_config);
 
-       /*
-        * Keep clocks always enabled:
-        *      video_cc_ahb_clk
-        *      video_cc_xo_clk
-        */
-       regmap_update_bits(regmap, 0xe58, BIT(0), BIT(0));
-       regmap_update_bits(regmap, video_cc_xo_clk_cbcr, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0xe58); /* VIDEO_CC_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, video_cc_xo_clk_cbcr); /* VIDEO_CC_XO_CLK */
 
        ret = qcom_cc_really_probe(pdev, &video_cc_sm8350_desc, regmap);
        pm_runtime_put(&pdev->dev);

diff --git a/drivers/clk/qcom/videocc-sm8450.c b/drivers/clk/qcom/videocc-sm8450.c
index 833d9ecbd305b0886533c8e29b26e33ce4b3373c..67df40f16423152e8c7e9544b43a4f01e7d03aaf 100644 (file)
--- a/drivers/clk/qcom/videocc-sm8450.c
+++ b/drivers/clk/qcom/videocc-sm8450.c
@@ -423,15 +423,10 @@ static int video_cc_sm8450_probe(struct platform_device *pdev)
        clk_lucid_evo_pll_configure(&video_cc_pll0, regmap, &video_cc_pll0_config);
        clk_lucid_evo_pll_configure(&video_cc_pll1, regmap, &video_cc_pll1_config);
 
-       /*
-        * Keep clocks always enabled:
-        *      video_cc_ahb_clk
-        *      video_cc_sleep_clk
-        *      video_cc_xo_clk
-        */
-       regmap_update_bits(regmap, 0x80e4, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x8130, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x8114, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x80e4); /* VIDEO_CC_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x8130); /* VIDEO_CC_SLEEP_CLK */
+       qcom_branch_set_clk_en(regmap, 0x8114); /* VIDEO_CC_XO_CLK */
 
        ret = qcom_cc_really_probe(pdev, &video_cc_sm8450_desc, regmap);
 

diff --git a/drivers/clk/qcom/videocc-sm8550.c b/drivers/clk/qcom/videocc-sm8550.c
index ab1ba8ae3d429099550452d044f9111ced601077..d73f747d2474009b7afb67e876d92d3a71529ce1 100644 (file)
--- a/drivers/clk/qcom/videocc-sm8550.c
+++ b/drivers/clk/qcom/videocc-sm8550.c
@@ -428,15 +428,10 @@ static int video_cc_sm8550_probe(struct platform_device *pdev)
        clk_lucid_ole_pll_configure(&video_cc_pll0, regmap, &video_cc_pll0_config);
        clk_lucid_ole_pll_configure(&video_cc_pll1, regmap, &video_cc_pll1_config);
 
-       /*
-        * Keep clocks always enabled:
-        *      video_cc_ahb_clk
-        *      video_cc_sleep_clk
-        *      video_cc_xo_clk
-        */
-       regmap_update_bits(regmap, 0x80f4, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x8140, BIT(0), BIT(0));
-       regmap_update_bits(regmap, 0x8124, BIT(0), BIT(0));
+       /* Keep some clocks always-on */
+       qcom_branch_set_clk_en(regmap, 0x80f4); /* VIDEO_CC_AHB_CLK */
+       qcom_branch_set_clk_en(regmap, 0x8140); /* VIDEO_CC_SLEEP_CLK */
+       qcom_branch_set_clk_en(regmap, 0x8124); /* VIDEO_CC_XO_CLK */
 
        ret = qcom_cc_really_probe(pdev, &video_cc_sm8550_desc, regmap);