drm/amd/display: Revise Replay Desync Error IRQ handle
authorDennis Chan <dennis.chan@amd.com>
Thu, 12 Oct 2023 15:08:25 +0000 (23:08 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 7 Nov 2023 17:03:30 +0000 (12:03 -0500)
[Why]
Current Desync IRQ handler will have some potential do not hit the
desync error case. We change to check both desync error HPD and DPCD.

Signed-off-by: Dennis Chan <dennis.chan@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Robin Chen <robin.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dc_types.h
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c

index bb159b6b1b76218c59463c834c160e10fb732c7e..cea666ea66c6144cad038aa9a8d833b2d36b0a78 100644 (file)
@@ -1039,6 +1039,7 @@ struct replay_config {
        uint32_t debug_flags;                           // Replay debug flags
        bool replay_timing_sync_supported; // Replay desync is supported
        bool force_disable_desync_error_check;             // Replay desync is supported
+       bool received_desync_error_hpd; //Replay Received Desync Error HPD.
        union replay_error_status replay_error_status; // Replay error status
 };
 
index 06e829ef48af24a99b4a37efd79fd35cd1cb6e5d..0c00e94e90b1d598fd1442fe46cd7629c821e779 100644 (file)
@@ -210,6 +210,9 @@ static void handle_hpd_irq_replay_sink(struct dc_link *link)
                &replay_error_status.raw,
                sizeof(replay_error_status.raw));
 
+       if (replay_configuration.bits.DESYNC_ERROR_STATUS)
+               link->replay_settings.config.received_desync_error_hpd = 1;
+
        link->replay_settings.config.replay_error_status.bits.LINK_CRC_ERROR =
                replay_error_status.bits.LINK_CRC_ERROR;
        link->replay_settings.config.replay_error_status.bits.DESYNC_ERROR =